Reply by Kenneth Porter November 13, 20032003-11-13
--On Wednesday, November 12, 2003 4:53 PM +0000 Sthane GOUEL
<> wrote:

> Ok, you're right about problem around DMA. FIFO mechanism with threshold
> is the solution but if I post my question it's because I found no
> information in my BF533 manual around FIFO and Threshold for UART (chap
> 13)!! Where is this information available, could you help me and open my
> eyes ! How to configure FIFO, threshold, empty FIFO, etc .....

I'm mostly familiar with the 535, and I think this info was in its user
manual (Acrobat format on the ADI website). I'm not sure where they hide it
for the 533. I'd guess the UART's and DMA controller are the same, so try
getting the 535 manual and use the info there.

Also, remember that the UART is supposed to be register-compatible with
PC-based ones, so you can probably dig up an Intel data sheet that
documents the intended functionality.



Reply by November 13, 20032003-11-13
Ok, you're right about problem around DMA. FIFO mechanism with threshold is
the solution but if I post my question it's because I found no information
in my BF533 manual around FIFO and Threshold for UART (chap 13)!! Where is
this information available, could you help me and open my eyes ! How to
configure FIFO, threshold, empty FIFO, etc .....

Thanks in advance

Stephane

Kenneth Porter a rit:

> --On Wednesday, November 12, 2003 3:38 PM +0000 Sthane GOUEL
> <> wrote:
>
>> I think DMA in order to have only one interrupt when my array is received
>> and not 64 interrupts, one for each char received. Just in order to not
>> disturb my real time application.
>
> Note that the UART has a FIFO with a configurable interrupt threshold, so you
> don't need to suffer an interrupt for every character. You might, for example,
> configure the system to interrupt after the FIFO had 12 characters, and the
> ISR would drain all 12 characters before returning to the background. The UART
> will also interrupt if a full character time passes between receiving
> characters when the FIFO isn't full, so you're guaranteed to see all the
> characters sent so far even if your peer stops sending in the middle of an
> expected sequence.
>
> The problem with DMA is that you need to know ahead of time how much to DMA,
> and you need some way of handling the case where the sender doesn't send all
> the bytes you were expecting.
>
> Alas, I've not looked closely at how the BF handles DMA with the UART. It may
> be that the hardware has facilities to handle timeouts and automatically shut
> down the DMA system on a timeout.
>
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Reply by November 12, 20032003-11-12
I think DMA in order to have only one interrupt when my array is received
and not 64 interrupts, one for each char received. Just in order to not
disturb my real time application.

Stephane Kenneth Porter a rit:

> --On Tuesday, November 11, 2003 1:49 PM +0000 Sthane GOUEL
> <> wrote:
>
>> I have to transfer an array (sizeof is 64) to my BF via UART, so I have to
>> install DMA.
>
> Why do you think you need DMA? Other options are polled I/O and interrupts.
> Since the BF's UART is supposed to be register-compatible with those found in
> PC's, you could use sample code from the DOS world. (If you use interrupts,
> you'll need new code to handle the BF's interrupt controller.)
>
> _____________________________________
> Note: If you do a simple "reply" with your email client, only the author of
this message will receive your answer. You need to do a "reply all" if you want
your answer to be distributed to the entire group.
>
> _____________________________________
> About this discussion group:
>
> To Join: Send an email to
>
> To Post: Send an email to
>
> To Leave: Send an email to
>
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Reply by Kenneth Porter November 12, 20032003-11-12
--On Wednesday, November 12, 2003 3:38 PM +0000 Sthane GOUEL
<> wrote:

> I think DMA in order to have only one interrupt when my array is received
> and not 64 interrupts, one for each char received. Just in order to not
> disturb my real time application.

Note that the UART has a FIFO with a configurable interrupt threshold, so you
don't need to suffer an interrupt for every character. You might, for example,
configure the system to interrupt after the FIFO had 12 characters, and the
ISR would drain all 12 characters before returning to the background. The UART
will also interrupt if a full character time passes between receiving
characters when the FIFO isn't full, so you're guaranteed to see all the
characters sent so far even if your peer stops sending in the middle of an
expected sequence.

The problem with DMA is that you need to know ahead of time how much to DMA,
and you need some way of handling the case where the sender doesn't send all
the bytes you were expecting.

Alas, I've not looked closely at how the BF handles DMA with the UART. It may
be that the hardware has facilities to handle timeouts and automatically shut
down the DMA system on a timeout.




Reply by Kenneth Porter November 12, 20032003-11-12
--On Tuesday, November 11, 2003 1:49 PM +0000 Sthane GOUEL
<> wrote:

> I have to transfer an array (sizeof is 64) to my BF via UART, so I have to
> install DMA.

Why do you think you need DMA? Other options are polled I/O and interrupts.
Since the BF's UART is supposed to be register-compatible with those found in
PC's, you could use sample code from the DOS world. (If you use interrupts,
you'll need new code to handle the BF's interrupt controller.)




Reply by November 11, 20032003-11-11
Hello

I have to transfer an array (sizeof is 64) to my BF via UART, so I have to
install DMA. Does somebody have experience with this, is there an EE-notes,
or an example somewhere?

Thanks in advance

Stephane