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I finally got it to work with the help of many suggestions and code from ADI and this loop. ADI supplied me with a modified bootloader and I had to upload the code with the bus width set to 16-bit in the SYSCON register. I also had to lower the timout value on the Loader to around 100 to prevent the Coldfire from generating a bus error. Thanks everyone for your help and suggestions. |
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Steve, Have you looked the 065L_host/prom.asm file? This file gives you the details, like how to place the program code in internal memory and external memory. I did not try with host boot loader. But I have some acquaintance with eprom booting. I think both this booting procedures are similar. On booting, the first 256 words are loaded in to the internal memory from the boot memory after that the loaded 256 words start executes. This 256 words mostly the host/prom boot loader provided by the AD. This boot loader loads the rest of the program words from the boot memory. For prom booting, the prom CS should be connected to the BMS line. While reset, the processor asserts BMS line and reads 256 words from the prom. After that the downloaded data starts executes, at this time BMS deserted, so any further read from the boot memory, u should asserts the BMS line again, this is done in the boot loader. The boot loader reads the rest of the program from the boot memory and places properly on internal and external memory. For 48 bit program code placement; the processor places this 48bit words in to PX register and by the use of the command "PM(address) = PX", this will places in to the internal memory. As you know, the external data bus is only 32 bit wide and also the external memory width is only 32bit. So placing a 48 bit instruction in to the external memory takes two memory placement operations. First places the lower 16bit places in an even address (pls check the memory organization and executing program from external memory- chapter 5 of 21065L users manual), and places the upper 32 bit in the following location. In the boot loader asm file, noted this section as "Fix Begin". So it may be bug in the earlier releases. Check your 065L_host.asm file. rgds ajith --- In , Mike Rosing <eresrch@e...> wrote: > On Tue, 13 Jan 2004, Steve Holle wrote: > > > I'm using the loader supplied by ADI. How do I change the packing mode? > > Look at pages 12-49 and 12-50 in the user's manual > http://www.analog.com/processors/processors/sharc/technicalLibrary/man uals/21065L-UM.html > > It sounds like you are trying EPROM mode, which is only 8 bits wide. > > > I would love to be able to do this but our current design does not drive > > the SRAM CS. I may be mistaken but I thought that if I couldn't write > > directly to the SRAM space I had to go thought the bootloader. > > For no boot mode, you just need to read SRAM, you don't need to write > to it. so you can run right out of sram, copy the code to internal ram, > then write to internal ram space. Internal running is faster, but if all > you need to do is copy the data from sram yourself, then noboot mode might > be easier. > > Otherwise, you need to use only 8 bits out of 32 to get the boot loader to > work right. How have you got BSEL and BMS pins configured? The boot > loader can not be modified for packing mode, but once the first 256 > instructions are loaded, you can do anything you want. Are the first 256 > words ADI's "boot loader"? If so, I bet you can set the packing mode some > where in that data. > > But you've got the cold fire to load sram with, no boot would be a lot > easier! > > Patience, persistence, truth, > Dr. mike |
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On Tue, 13 Jan 2004, Steve Holle wrote: > I'm using the loader supplied by ADI. How do I change the packing mode? Look at pages 12-49 and 12-50 in the user's manual http://www.analog.com/processors/processors/sharc/technicalLibrary/manuals/21065\ L-UM.html It sounds like you are trying EPROM mode, which is only 8 bits wide. > I would love to be able to do this but our current design does not drive > the SRAM CS. I may be mistaken but I thought that if I couldn't write > directly to the SRAM space I had to go thought the bootloader. For no boot mode, you just need to read SRAM, you don't need to write to it. so you can run right out of sram, copy the code to internal ram, then write to internal ram space. Internal running is faster, but if all you need to do is copy the data from sram yourself, then noboot mode might be easier. Otherwise, you need to use only 8 bits out of 32 to get the boot loader to work right. How have you got BSEL and BMS pins configured? The boot loader can not be modified for packing mode, but once the first 256 instructions are loaded, you can do anything you want. Are the first 256 words ADI's "boot loader"? If so, I bet you can set the packing mode some where in that data. But you've got the cold fire to load sram with, no boot would be a lot easier! Patience, persistence, truth, Dr. mike |
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At 09:05 AM 1/13/2004, Mike Rosing wrote:On Mon, 12 Jan 2004, Steve Holle wrote: I'm using the loader supplied by ADI. How do I change the packing mode? I would also look at "no boot" mode. The I would love to be able to do this but our current design does not drive the SRAM CS. I may be mistaken but I thought that if I couldn't write directly to the SRAM space I had to go thought the bootloader. Just a couple of changes, and I think you'll be running full speed.-------------------------- Steve Holle Link Communications, Inc. 1035 Cerise Road Billings, Montana 59101-7378 406.245.5002 s...@link-comm.com -------------------------- |
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On Mon, 12 Jan 2004, Steve Holle wrote: > I'm so close I can taste it. Just one more step. Yeah, it's always one bit in a billion that fixes everything :-) > We have a system comprised of an ADSP-21065L with two 256kx16 SRAM > connected as a 256kx32 SRAM. This system also has a 32-bit Host Port > connected to a Motorola 32-bit Coldfire processor bus. I am able to boot > using the Host Port as long as I don't use the external SRAM in my > program. I've created a simple app that just turns on 4 LEDs connected to > Flag lines to demonstrate boot completion. I can run the program without > and with external SRAM using the Summit ICE BMD. I can upload the non-SRAM > program using the Host Port and it works fine. When I load code into SRAM > the program fails. > > I've compared the code loaded into internal memory (0x8000-) and external > memory (0x20000-) and the external memory using the BMD by loading from the > BMD and dumping memory and loading from the Host port and using the BMD to > dump memory. The internal memory seems to be the same but the external > memory is not correct. The problem seems to be some mismatch in packing > but I don't know where I need to change it. Do I need to change it in the > ADI host bootloader code? The bootloader seems to produce 16-bit words so > it seems that it is expecting 16-bits at a time but how does the bootloader > know how to pack the data in external SRAM? I think you want to look at the packing mode really carefully. It uses 64 bits for every 48 bit instruction, so you have one 16 bit block of zeros for every instruction. I would also look at "no boot" mode. The processor wakes up and expects valid code in SRAM, and just executes it directly rather than trying to move it from external to internal space. Since you have 32 bits for the external bus, that seems like the easiest way to do things. but check the 065 manual for how it uses its 32 bit external data bus to read instructions. Just a couple of changes, and I think you'll be running full speed. Good luck! Patience, persistence, truth, Dr. mike |
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I'm so close I can taste it. Just one more step. We have a system comprised of an ADSP-21065L with two 256kx16 SRAM connected as a 256kx32 SRAM. This system also has a 32-bit Host Port connected to a Motorola 32-bit Coldfire processor bus. I am able to boot using the Host Port as long as I don't use the external SRAM in my program. I've created a simple app that just turns on 4 LEDs connected to Flag lines to demonstrate boot completion. I can run the program without and with external SRAM using the Summit ICE BMD. I can upload the non-SRAM program using the Host Port and it works fine. When I load code into SRAM the program fails. I've compared the code loaded into internal memory (0x8000-) and external memory (0x20000-) and the external memory using the BMD by loading from the BMD and dumping memory and loading from the Host port and using the BMD to dump memory. The internal memory seems to be the same but the external memory is not correct. The problem seems to be some mismatch in packing but I don't know where I need to change it. Do I need to change it in the ADI host bootloader code? The bootloader seems to produce 16-bit words so it seems that it is expecting 16-bits at a time but how does the bootloader know how to pack the data in external SRAM? Any advice would be greatly appreciated. -------------------------- Steve Holle Link Communications, Inc. 1035 Cerise Road Billings, Montana 59101-7378 406.245.5002 s...@link-comm.com -------------------------- |
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