I think you'll be better off using GPIO to bit bang the SPI...
dB --- gusflit <> wrote:
> Hi to all,
> I already got some help from this forum a few months ago, maybe you
> can help me this time again.
> I need to communicate with the control port of an audio codec. The
> communication format is a standard SPI derivative, consisting of:
> - A gated bit clock synchronizing the data,
> - 1 line data IN (16 bits)
> - 1 line data OUT (16 bits)
> - 1 'frame sync' signal.
> The ESSI ports of the DSP are not available anymore in the design,
> that's why i need the SCI to be in charge of this communication. The
> SCI has a special synchronous mode which enables me to produce the 3
> first signals described above (bit clock, data IN, data OUT).
> Now here's my problem: i want to produce the 'frame sync' signal with
> a GPIO pin, but can't get any synchronisation of this signal relative
> to the serial signals. I've checked the User Manual, they mention
> there is a variable delay of 2 to 4 serial clock periods between the
> time the SCI transmit register is fed and the time the data appear on
> the line. I'm afraid i'm out of the codec specifications.
> Does anyone have an idea of how i could have the 'frame sync' line
> sync'ed to the serial signals (even with external hardware logic)?
> Thanks for reading
> Gustave >
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