Hi,

Thanks for the replies.

The 2.5078 mbps clock is derived from an external  2.048 clock , so the
two clocks are synchronous.

When a 238 byte block is received (this takes approximately 1ms at 2
mbps rate) RS enocoder outputs 255 bytes into the interleaver. I have
moved this part to the 'main'.

  Meanwhile  since the output rate is 2.5078 , with a 8 byte Tx buffer,
I get about 37 Tx interrupts in this 1ms interval.

Since this ratio is not an interger , I was wondering if there would be
problem of read pointer exceeding write pointer or otherwise.

-prak

On 23 Mar 2005 16:20:51 -0800, "john" <johns@xetron.com> wrote:

>prak wrote:
>> We have implemented a reed solomon encoder (238,255) followed by an
>> interleaver (depth of 3 blocks of 255) .Over this we perform
>> convolutional encoding. The codes are running on the adsp 219x
>> processor.
>>
>>  The incoming clock rate is at 2.048 Mbps and outgoing bits are
>pushed
>> out at a clock rate which is basically 2.048*255/238 *8/7 = 2.5078
>> Mbps . We have this running on a adsp 219x processor. I have set the
>> incoming Rx sport buffer size as 238 bytes .for every 238 bytes i
>have
>> a Rx interrupt, the  the RS encoder sits in the 'main' and gives  255
>> bytes, which is populated into the interleaver buffer. Now the
>> convolutional code sits in the Tx ISR and  reads 7 bytes at a time
>> from the interleaver buffer; (which is of length 255*3 bytes) and
>> outputs 8 bytes which is transmitted at 2.5078 Mbps. Therefore the
>> transmit interrupt rate is at a much higher rate than Rx interrupt.
>>
>>
>> My question is while doing this , will not there be a time when the
>> read pointer of the convolutional code , overtake the write pointer
>of
>> the interleaver buffer.,because of the rate mismatch.?
>>
>> How should I take care of this ,any suggestions or ideas?
>>
>> Thanks a lot for any help.
>
>If the input and output clocks are asynchronous, you will have under or
>over run problems eventually. The best solution is to make the clocks
>synchronous. Give us some detail about where your clocks come from.
>
>John

I think that's the gist of it:  as long as the input and output clocks
are locked to each other (via a PLL or DLL or something) and matched
to the code rate you shouldn't have a problem.   If the two clocks
free run then you'll eventually wind up with either overflow or
underflow at some point.


Eric Jacobsen
Minister of Algorithms, Intel Corp.
My opinions may not be Intel's opinions.
http://www.ericjacobsen.org

the input and output rate of the interlkeaver buffer itself should be
equal.

Interleaving requires storage, the buffer needs to be big enough to
handle the temporary storage needed for interleaving but the long term
input and output rates should be equal.

What rate mis-match are you refering to?


Mark

prak wrote:
> We have implemented a reed solomon encoder (238,255) followed by an
> interleaver (depth of 3 blocks of 255) .Over this we perform
> convolutional encoding. The codes are running on the adsp 219x
> processor.
>
>  The incoming clock rate is at 2.048 Mbps and outgoing bits are
pushed
> out at a clock rate which is basically 2.048*255/238 *8/7 = 2.5078
> Mbps . We have this running on a adsp 219x processor. I have set the
> incoming Rx sport buffer size as 238 bytes .for every 238 bytes i
have
> a Rx interrupt, the  the RS encoder sits in the 'main' and gives  255
> bytes, which is populated into the interleaver buffer. Now the
> convolutional code sits in the Tx ISR and  reads 7 bytes at a time
> from the interleaver buffer; (which is of length 255*3 bytes) and
> outputs 8 bytes which is transmitted at 2.5078 Mbps. Therefore the
> transmit interrupt rate is at a much higher rate than Rx interrupt.
>
>
> My question is while doing this , will not there be a time when the
> read pointer of the convolutional code , overtake the write pointer
of
> the interleaver buffer.,because of the rate mismatch.?
>
> How should I take care of this ,any suggestions or ideas?
>
> Thanks a lot for any help.

If the input and output clocks are asynchronous, you will have under or
over run problems eventually. The best solution is to make the clocks
synchronous. Give us some detail about where your clocks come from.

John

We have implemented a reed solomon encoder (238,255) followed by an
interleaver (depth of 3 blocks of 255) .Over this we perform
convolutional encoding. The codes are running on the adsp 219x
processor.

 The incoming clock rate is at 2.048 Mbps and outgoing bits are pushed
out at a clock rate which is basically 2.048*255/238 *8/7 = 2.5078
Mbps . We have this running on a adsp 219x processor. I have set the
incoming Rx sport buffer size as 238 bytes .for every 238 bytes i have
a Rx interrupt, the  the RS encoder sits in the 'main' and gives  255
bytes, which is populated into the interleaver buffer. Now the
convolutional code sits in the Tx ISR and  reads 7 bytes at a time
from the interleaver buffer; (which is of length 255*3 bytes) and
outputs 8 bytes which is transmitted at 2.5078 Mbps. Therefore the
transmit interrupt rate is at a much higher rate than Rx interrupt.


My question is while doing this , will not there be a time when the
read pointer of the convolutional code , overtake the write pointer of
the interleaver buffer.,because of the rate mismatch.?

How should I take care of this ,any suggestions or ideas?

Thanks a lot for any help.