Using the ADSP-21992 SPORT for polled asynchronous UART operation
Having refferd to ADI's EE60 and AN401-08 on
interrupt-driven SPORT operation, I would like to adapt these ideas for
polled operation in C, at least just to start
with. Transmission has proven relatively painless, and can easily be done
at a bit rate = serial clock rate, not having to go at 3x. Receiving has
proven thus far painful. After initializing the SPORT Rx for 3x, NO
FSRequired, just to trigger data reception on the falling start bit, and 16 bits
(not 15), the idea is to poll the receiver status flag until let the receiver
receives the first 16 bits (at 3x), read that in, and then poll again waiting
for the second 16-bits (NO FS required), and then disabling the SPORT, and
re-enabling it to re-set it to re-synch it to the next start bit. The two
words can then be processed as a single 32-bit something like:
// The basic idea:
char URx_char (void)
{ // Assume SPORT Rx initialized with FSR=0,
SLEN (for 16 bits)
// SCLK = 3x data bit rate
char cX = 0,
// Char. returned
cBit;
// Mask bit
union {
// 2 16-bit words
long lX;
// handled as one 32-bit
struct {
int
MSW, LSW;
} Ints;
}
Rx;
sysreg_write (sysreg_IOPG, SPORT0_Controller_Page);
while
(!(io_read (SP0_STATR) & RXS_bit)); //
Wait for 1-st word
Rx.Ints.LSW = io_read (SP0_RX);
// Read in 1-st 16 bits
while
(!(io_read (SP0_STATR) & RXS_bit)); //
Wait for 2-nd word
Rx.Ints.MSW = io_read (SP0_RX);
// Read in 2-nd 16 bits
//
Disable and re-enable SPORT Rx to synch to next start bit
for
(cBit= 1 ; cBit & 0xFF ; cBit <<= 1, Rx.lX >>= 3) //
test every 3-rd bit
if
(Rx.Ints.LSW & 1)
cX |=
cBit ;
return cX;
} // URx_char()
The question: how to properly re-start the SPORT
Rx to re-synch to the next start bit.
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