Hi Steve, I've also programmed the 21065l, and on it, the number of channels, as you mentioned, is configurable with a rather flexible number of possible channels. BTW, I've used the same codec with 21065L with no problem at all. The issue here is that on the 218x the multichannel mode only allows for 24 or 32 words, no way to be otherwise. And the bit clock can't be much higher, since the maximum permitted click for the CODEC is MCLK = 18.43 MHz. I'm using MCLKC = 12 MHz clock, with which I can run BCLK = MCLK = 12 MHz. With any other MCLK the codec must work on slave mode, and regardless of that, at sampling rates different than 88.2 KHz or 96 KHz, BCLK = MCLK/4, so it won't help too even if I change the mode of operation (on the codec side) from master @ 12MHz to slave @ any other MCLK. So, it seems that my highest sampling frequency can be when I have the MCLK = BCLK = 12MHz, and in multichannel mode for 24 words, each of 16 bits, which translates into 31250 Hz. I'll only use slots 0 and 1, so the other time will be a waste... Anyway, I'm still looking for comments about my question. TIA, JaaC --- Steve Holle <> wrote: > I'm not sure about the 2188 but on the 21065L, if I > remember right, the > number of channels, clock rate, and frame timing are > all under program > control. Why not just speed up the clock rate to > fit your timing requirement? > . > At 02:19 PM 6/10/2004, Jaime Andres Aranguren > Cardona wrote: > >Hi Steve, > > > >That's good to know, that confirms my expectations. > > > >Now, the second part, the most interesting for me: > >what would happen (with 2188, not 21065L) if the > >sample buffer time is not enough for 24 (or 32) > words, > >but just for 17 of them? I just need data from time > >slots 0 and 1. > > > >JaaC > > > >--- Steve Holle <> wrote: > > > We are using an system with 5 21065L processors > on > > > the TDM bus and have set > > > up the timing so all 10 channels ( two per > device ) > > > finish in about 1/2 > > > sample buffer time. The rest of the time the > TCM > > > channel is inactive until > > > the next frame sync. We are passing > uncompressed > > > 16-bit audio data for > > > each channel to all cards that is then mixed for > > > output on individual > > > output channels. It is working very well. > > > > > > At 07:07 AM 6/10/2004, Jaime Andres Aranguren > > > Cardona wrote: > > > >Thank you everybody, > > > > > > > >Well, it was my fault... I was writting 0x240 > to > > > the > > > >SPORT0 Control Register... I don't know why, I > was > > > >maybe a bit distracted. I changed to 0x281F and > > > worked > > > >without problems. > > > > > > > >I've got another question. Suppose all the > signals, > > > >except DT0 are generated externally, SPORT0 > acting > > > as > > > >a slave in some sense. When using SPORT0 in > > > >Multichannel mode, it can only be 24 or 32 > words > > > per > > > >frame, there is no way to change that, right? > Well, > > > >let's suppose I set things up to receive (and > send) > > > 24 > > > >words, but just need channels 0 and 1. What > happens > > > if > > > >the timing between RFS0s is longer than the > time > > > for > > > >384 (= 16 x 24) bit clocks? In other words, > what > > > >happens if the SPORT0 is configured for 24 > words, > > > but > > > >the framing time allows for more than 24 words? > I'd > > > >expect the SPORT to receive the 2 first words > > > >(channels 0 and 1 are active), then wait for 22 > > > more > > > >words (352 bit clocks) then do nothing, just > wait > > > for > > > >the next assertion of RFS0. Am I right? > > > > > > > >And what happens if the time between frames > (the > > > time > > > >between assertions of RFS0) is SHORTER than the > > > time > > > >for 24 words, SHORTER than 384 bit clocks? What > > > would > > > >happen if at bit clock 250 or 272 I receive > RFS0 > > > >again, before the whole frame of 24 words (384 > bit > > > >clocks) has been received? That would mean that > I > > > just > > > >received 15.625 or 17 words in the frame, > instead > > > of > > > >the 24 words that were expected. In that case > what > > > >happens: does the SPORT0 stops receiveind the > 24 > > > frame > > > >and restarts receiveing a new one (channles 0 > and 1 > > > >successfuly aquired), or does the SPORT still > wait > > > for > > > >the remaining frames, then waits for the next > > > RFS0?? > > > > > > > >All of your help is very welcome. > > > > > > > >Regards, > > > > > > > >JaaC > > > > > > > >--- ayyam perumal <> wrote: > > > > > Hai there, > > > > > > > > > > have a try by writing seperate ISR > for > > > > > Transmit.so,store the rxo content in local > > > variable > > > > > in > > > > > receiving ISR and in Transmit ISR store this > > > local > > > > > variable value to tx0.As i am interfacing > > > ad73311 > > > > > with > > > > > adsp2186m i did the same and its working > well. > > > > > > > > > > > > > > > hope it will help u.... > > > > > > > > > > with good regards > > > > > ayyams > > > > > > > > > > --- Jaime_Andr_Aranguren_Cardona > > > > > <> wrote: > Hello, > > > > > > > > > > > > I have a setup where an ADSP-2188N is > > > connected to > > > > > > an audio codec > > > > > > which acts as master (the codec), > generating > > > > > bclk0, > > > > > > tfs0, rfs0, and > > > > > > of course dr0. These signals seem to be ok > > > with an > > > > > > o'scope. > > > > > > > > > > > > I configured SPORT0 as follows: > > > > > > - multichannel disabled. > > > > > > - tfs and rfs required. > > > > > > - tfs and rfs external. > > > > > > - 16 bit data. > > > > > > - external clock. > > > > > > - normal framing. > > > > > > - non-inverted framing. > > > > > > > > > > > > I set IMASK to 0x020 to enable SPORT0 Rx > > > > > interrupts > > > > > > and SYSCON = > > > > > > SYSCON | 0x1000 to enable SPORT0. > > > > > > > > > > > > I also set an ISR for SPORT0 Rx interrupt > > > > > servicing. > > > > > > On it, I just do > > > > > > this: > > > > > > > > > > > > toggle fl1; > > > > > > ax0 = rx0; > > > > > > tx0 = ax0; > > > > > > rti; > > > > > > > > > > > > So, this is a very simple talktrough > program. > > > With > > > > > > an o'scope, I can > > > > > > see the fl1 pin toggling at the same rate > as > > > the > > > > > > rfs0 signal as > > > > > > expected, which indicates that the > interrupt > > > is > > > > > > being serviced. tfs0 > > > > > > is the same signal as rfs0, and is being > > > generated > > > > > > by the codec. > > > > > > however, I see no data at all coming out > the > > > dt0 > === message truncated === ===== Jaime Andr Aranguren Cardona __________________________________ |