Hi,
I have been looking into making sound with my BF-533 EZ Kit lite this
week-end, so i read about SPORT, DMA, AD1836 ( and I2S ) and practiced a
little. Maybe i can share what i have understood so far. Anyone, pardon me
and please correct me if i am wrong here :-)
I'll talk about the I2S example.
Both the AD1836 codec and the SPORT were configured to deal with 24 bits
word size, and here we know each of those 24bits words actually represent
one sample.
When SPORT receives a sample from the codec, only 24 bits are exchanged
through the SPORT.
Once a 24 bits sample has been received, it is placed in the SPORT receive
FIFO.
Note that, because the "8-deep" FIFO lines are 16bits wide and that
our word
(sample) size is 24bits, one sample will take 2 lines ( so our SPORT FIFO is
actually "4-deep" here). In other words, inside the FIFO, one sample
will
occupy 32bits although only 24 are really meaningful to us. The 8 extra bits
were not transmitted through the SPORT, it is just some extra room in the
FIFO line that we don't use.
One of the states of the receive FIFO can look like this :
FIFO line #7 - [15:0] sample 3 Lowest 16bits
FIFO line #6 - [15:8] 8 unused bits [7:0] sample 3 Highest 8bits
FIFO line #5 - [15:0] sample 2 Lowest 16bits
FIFO line #4 - [15:8] 8 unused bits [7:0] sample 2 Highest 8bits
FIFO line #3 - [15:0] sample 1 Lowest 16bits
FIFO line #2 - [15:8] 8 unused bits [7:0] sample 1 Highest 8bits
FIFO line #1 - [15:0] sample 0 Lowest 16bits
FIFO line #0 - [15:8] 8 unused bits [7:0] sample 0 Highest 8bits
If the "secondary side" bit would not been set ( in fact, it is, in
the I2S
example ), then sample 0 is left channel sample #1, sample 1 is right
channel sample #1, sample 2 is left channel sample #2, sample 3 is right
channel sample #2, sample 4 is left channel sample #3, sample 5 is right
channel sample #3 .... and so on...
Then comes the DMA.
It can be configured to do transfers of 8, 16 or 32 bits items ( not 24 bits
... ).
In the examples, it is configured to do 32 bits word exchanges between the
memory and the SPORT, that is, with the SPORT's receive/transmit FIFOs.
The
8 extra bits are actually part of each 32bits exchange. We store one sample
as a 32bits integer in view of being processed, but we have to keep in mind
that only the bits [SLEN:0] actually represent the sample.
I hope that answer your question :)
May i know which example you are talking about exactly ? the I2S one or the
TDM one ?
I haven't looked into the TDM one, but for the I2S one, there are more
things going on mainly because SPORT is configured with the secondary side
bit activated for both receive and transmit.
That means SPORT transmit and received to/from both its primary and
secondary data lines at the same time (transmists to the AD1836's DSDATA1
&
DSDATA2 lines and receives from ASDATA1 & ASDATA2 lines), meaning that we
actually deal with 4 channels ( the 2 stereo ADCs and 2 first of the 3
stereo DACs ).
The receive FIFO state described above would change.
sample 0 is StereoADC1 Left channel sample #1
sample 1 is StereoADC2 Left channel sample #1
sample 2 is StereoADC1 Right channel sample #1
sample 3 is StereoADC2 Right channel sample #1
sample 4 is StereoADC1 Left channel sample #2
sample 5 is StereoADC2 Left channel sample #2
sample 6 is StereoADC1 Right channel sample #2
sample 7 is StereoADC2 Right channel sample #2
... and so on...
Cheers,
Laurent
----- Original Message -----
From: "Steve Holle" <>
To: "shwetha shwetha" <>; <>
Sent: Monday, October 25, 2004 12:06 PM
Subject: Re: [adsp] adt Sport and DMA
>
>
> Someone more knowledgeable should correct any errors you see here. Even
> though the data from the codec is 24-bits, data inside the DSP is
> transferred in 32-bit words. The SLEN parameter indicates how many
clocks
> are needed to transfer one codec word, which is then placed in 32-bit
memory.
>
> At 08:42 AM 10/25/2004, shwetha shwetha wrote:
> >Hi,
> >
> >I am kind of new to this ADSP....
> >
> >I am working on the ADSP BF533 EZ-kit lite example
> >"Audio talk through" .....
> >
> >In the C code they have set the SLEN$,since the
> >codec(AD1836)sends 24 bits....
> >
> >but then the DMA transfer is32 bit....
> >
> >i don't understand this...
> >
> >Also... in the chapter Sport,while talking adt this
> >SLEN..tells that the DMA can dump 32 bit to the TX
> >buffer of the SPORT of which,the SLEN (in this case
> >24bits) bits are transfered thor' the sport...
> >
> >If it does like that,when r the remaining (32-24=8
> >bits) 8 bits transfered thro' the sport?
> >
> >Please i am in a pathetic stage.. now at my work.. so
> >kindly help me to understand this....i will be very
> >grateful...
> >
> >thanking u all in advance and eagerly waiting for the
> >early reply from the expertiese.....
> >
> >
> >
>
>________________________________________________________________________
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> >
> >
> >
> >
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> Steve Holle
> Link Communications, Inc.
> 1035 Cerise Rd.
> Billings, MT 59101
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