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Dear friends, I am having some doubts regarding FFT implementation in TS101. TS101 is having Complex data format .i.e in 32-bit 0-15(real) and(16-31) img data. But if u come to C format (IN Visual DSP++) Struct complex_float { float re; float im but how to incorporate 32bit complex data format in C. someone please give the solution for this. Thanking you Jaime Andres Aranguren Cardona <j...@yahoo.com> wrote:
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Hi, --- Mike Rosing <> wrote: > That makes sense. I forgot there's a fifo in there. > You > can keep the fifo full and that should give you a > lot fewer > misses. With two different clocks you can't avoid > collisions, > but it seems like you've minimized them well! Yes, seems like I could get tit to work. Comparing the captured data on the DUT (another 21065L-EZLITE), both waveforms look "pretty", just one delayed respect to the other one, which doesn't matter for my test, and aplitudes a bit different, but that is because of the DAC - ADC conversions in the analog version, while the SPORT - to - SPORT connection preserves the data with all it bits, in digital form. Thank you very, very much for your time and patience. ===== Jaime Andr Aranguren Cardona __________________________________ |
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On Tue, 14 Dec 2004, Jaime Andres Aranguren Cardona wrote: > Just for playing around, I decided to check for not > full TX buffer, instead of checking for fully empty > buffer, which I was doing before. > > I ran it for around 2 minutes and it gave me a value > of 972912 samples sent off SPORT1, and 974880 samples > sent off SPORT0, which I think is now tolerable. > > Will continue playing... That makes sense. I forgot there's a fifo in there. You can keep the fifo full and that should give you a lot fewer misses. With two different clocks you can't avoid collisions, but it seems like you've minimized them well! Patience, persistence, truth, Dr. mike |
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Hello, > > I guess the first thing to try is to get sport0 to > > work > > all by itself. See if you can input and then > > retransmit > > the same data - keep sport1 off. Once you get > that > > doing > > what you want, toss in sport1. Just for playing around, I decided to check for not full TX buffer, instead of checking for fully empty buffer, which I was doing before. I ran it for around 2 minutes and it gave me a value of 972912 samples sent off SPORT1, and 974880 samples sent off SPORT0, which I think is now tolerable. Will continue playing... Regards, ===== Jaime Andr Aranguren Cardona __________________________________ |
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Hello Mike, and everybody else. --- Mike Rosing <> wrote: > Seems like it ought to work! Do you multiple > channels > enabled, or is it one word, one transmit? The SPORT1 stuff is several channels "long", due to the requeriments of the AD1819 CODEC, and the sampling rate (8kHz) which is different than 48kHz. anyway, I wouldn't think it's a problem, since the SPORTs are independent of each other, aren't they? > I guess the first thing to try is to get sport0 to > work > all by itself. See if you can input and then > retransmit > the same data - keep sport1 off. Once you get that > doing > what you want, toss in sport1. Well, actually SPORT0 is only used for transmission. But you are right, I'll try first with getting this one to work (SPORT1 works for what it's intended). > It's kinda like juggling. When the eggs break on > your head, > you know something is wrong :-) Sure! The question could be more general: how do you get two or more SPORTs working concurrently on SHARCs? It could be simple: just configure each one and work with it, forgetting about the other SPORTs. How to make the several SPORTs transmit the same data, at different bitclocks? Thanks for all of your comments. ===== Jaime Andr Aranguren Cardona __________________________________________________ |
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On Mon, 13 Dec 2004, Jaime Andres Aranguren Cardona wrote: > At 60MHz, I set the SPORT0 clock divider to 59, to > generate a 1MHz SCLK, and frame signal divider to 124, > so I have one TFS at 8 kHz. TFS is required and data > dependent. Both signals are generated internally. Is > there a way to use TX0_A asynchronously, in the sense > of not being bounded by a fixed rate, still being TFS > internally generated, so the data is sent and the TFS > signal is generated ONLY when I write to TX0_A > (provided that the TX buffer is not full)? > > I don't exactly remember the configuration for SPORT1, > which drives the CODEC, since I am not at my workplace > right now. But as far as I recall, it's configured for > 12.288 Mhz SCLK and 48kHz. > > Although they are not the same, I think it would be > fine for whay I want to do, don't you agree? Seems like it ought to work! Do you multiple channels enabled, or is it one word, one transmit? I guess the first thing to try is to get sport0 to work all by itself. See if you can input and then retransmit the same data - keep sport1 off. Once you get that doing what you want, toss in sport1. It's kinda like juggling. When the eggs break on your head, you know something is wrong :-) Patience, persistence, truth, Dr. mike |
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Mike, thanks for your reply --- Mike Rosing <> wrote: > count0 will be less than count 1 when have to wait > for > tx empty. So you want to set things up so that > can't happen > except on very rare occasions. That's what I want to do. Moreover, in the ideal case I don't want it to happen, because it's important for my testing that I get all of the samples in both the digital and analog representations. I just wrote the countX stuff to check how was it going, and I just saw that it was not going fine. Sniff! > Have you got the same clocks for sport0 and sport1? > The transmit > and receive clocks should all be from 1 source. You > should also > make sure the sports are similar in transmission > scheme, so they > will operate at the same speed. In other words, > make them identical > with lots of time for them to do nothing so the > other channel can > do the same thing and then nothing so there's no > interference. In my setup the DSP is idle most of the time. Only when it gets interrupted by the AD1819 - DSP link, it calls the ISR , and within it it checks if the ADCs have valid data, if that is the case (every 125 mS), then it calls the routine to generate a sample of the AM modulated signal, and that sample is sent back to the CODEC's DACs (via SPORT1), and trnamitted as an analog signal. Here is where I want the SPORT0 to tarnsmit the same sample, but untouched it its digital format. At 60MHz, I set the SPORT0 clock divider to 59, to generate a 1MHz SCLK, and frame signal divider to 124, so I have one TFS at 8 kHz. TFS is required and data dependent. Both signals are generated internally. Is there a way to use TX0_A asynchronously, in the sense of not being bounded by a fixed rate, still being TFS internally generated, so the data is sent and the TFS signal is generated ONLY when I write to TX0_A (provided that the TX buffer is not full)? I don't exactly remember the configuration for SPORT1, which drives the CODEC, since I am not at my workplace right now. But as far as I recall, it's configured for 12.288 Mhz SCLK and 48kHz. Although they are not the same, I think it would be fine for whay I want to do, don't you agree? I'd certainly appreciate it if you can further explain me about what the requeriments would be to make this work. Why is it THAT important that both clocks are the same and use similar tx schemes? And of course, all of the additional sugestions are VERY welcome. > Your base clocks have to be fast enough to do this > though. > > Patience, persistence, truth, > Dr. mike ===== Jaime Andr Aranguren Cardona __________________________________ |
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On Mon, 13 Dec 2004, [iso-8859-1] Jaime Andr Aranguren Cardona wrote: > Hello, Howdy Jaime! > I am using ADDS-21065L-EZLITE as the "signal generator" for testing > the project I am working on. I want to feed my DUT (device under > test, another ADDS-21065L-EZLITE) with both the analog version and > the digital version of the test data, generated with the 21065L. > > The generated data is basically an AM modulated signal, with carrier > at 60Hz, sampled at 8kHz. > > I install the ISR for the SPORT1 like this: > > /* Install SPORT1 TX Audio Processing Function */ > interrupts (SIG_SPT1I, Sport1_Tx_ISR_Function); > > The ISR is this: > > void Sport1_Tx_ISR_Function() > { > unsigned int tmpSTCTL0; > > Record_AD1819A_Audio_Input(); > > /* Call your C-DSP Audio Routines Here!! */ > > /* Generate test signals */ > if (RX_right_flag == 1 && RX_left_flag == 1) { > ProcessOscillation (); > > count1++; > > tmpSTCTL0 = *pSTCTL0 & 0xC0000000; > if (tmpSTCTL0 == 0) { > // Send digitally out to SPORT0, TX_A > *pTX0_A = *(unsigned int*)(&Left_Channel_Out); > > count0++; > } count0 will be less than count 1 when have to wait for tx empty. So you want to set things up so that can't happen except on very rare occasions. Have you got the same clocks for sport0 and sport1? The transmit and receive clocks should all be from 1 source. You should also make sure the sports are similar in transmission scheme, so they will operate at the same speed. In other words, make them identical with lots of time for them to do nothing so the other channel can do the same thing and then nothing so there's no interference. Your base clocks have to be fast enough to do this though. Patience, persistence, truth, Dr. mike |
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Hello, I am using ADDS-21065L-EZLITE as the "signal generator" for testing the project I am working on. I want to feed my DUT (device under test, another ADDS-21065L-EZLITE) with both the analog version and the digital version of the test data, generated with the 21065L. The generated data is basically an AM modulated signal, with carrier at 60Hz, sampled at 8kHz. I install the ISR for the SPORT1 like this: /* Install SPORT1 TX Audio Processing Function */ interrupts (SIG_SPT1I, Sport1_Tx_ISR_Function); The ISR is this: void Sport1_Tx_ISR_Function() { unsigned int tmpSTCTL0; Record_AD1819A_Audio_Input(); /* Call your C-DSP Audio Routines Here!! */ /* Generate test signals */ if (RX_right_flag == 1 && RX_left_flag == 1) { ProcessOscillation (); count1++; tmpSTCTL0 = *pSTCTL0 & 0xC0000000; if (tmpSTCTL0 == 0) { // Send digitally out to SPORT0, TX_A *pTX0_A = *(unsigned int*)(&Left_Channel_Out); count0++; } RX_right_flag = 0; // clear right rx_flag RX_left_flag = 0; // clear left rx_flag } Playback_Audio_Data(); } This should be this way because of the tricks necessary to run the AD1819 with a sample rate different than 48kHz, data is available when both RX_right_flag and RX_left_flag equal 1, which occurs every 125mS, giving a sample rate of 8kHz. This way I send the analog version of the data out the CODEC (AD1819). But I want to send the data in it's digital form, 32 bits, over SPORT0 (SPORT1 is used for CODEC interfacing). If I just write to TX0_A withouth checking the status of the TX buffer, I get intermitent analog data, which can be heard with speakers connected to the LINE_OUT of the EZLITE. This is because it's possible that I am writting to a full or partially full TX buffer, so I wait till it's empty. count0 and count1 help me to check how many samples are sent off SPORT1 (analog version via the CODEC, at 8kHz) and off SPORT0 (digital version, via the SPORT0 pins, supposed to be at 8kHz too). After running for a while, I get different values for count0 and count1, being count1 higher, which makes me think that some samples are not being put off SPORT0, maybe because of full or partially full buffer, but I can hear (and see with a scope) the modualted analog output signal, which is good. So what do you recommend me for synchonizing both SPORTs: - Setting BHD (Buffer Hang Disable) in the SYSCON register? - Blocking only for full TX0_A buffer, and allowing partially full buffer? - Any other scheme? Kindest regards, -- Jaime Andr Aranguren Cardona SanJaaC Electronics Soluciones en DSP www.sanjaac.com |