At 08:50 PM 5/5/2004, you wrote: >Hi, > >I'm building a simple circuit featuring a 6211 and 16Mb of Micron >SDRAM (32-wide) that I hope to mass produce as cheaply as possible. > >Studying the Spectrum Digital designs, they series terminate all the >EMIF signals with 33 ohm resistor networks. > >- Is that really required? >- What would happen if I don't install the resistor networks? >- Would the EMIF function correctly without termination if I reduce >SDRAM speed? > >(Why doesn't TI place 33 ohm resistor inside the EMIF pins anyways) The behavior of high speed electrical signals is complex. In general this is termed, Signal Integrity (SI). Often, the impedance of the trace between the driver and the receiver is not the same as either the driver or the receiver. This results in reflections, possibly multiple, which show up as uneven voltages as compared to the ideal digital switching between low and high states. It can even result in voltage swings significantly below ground or above Vdd which can do damage to chips. How you deal with SI issues depends on a lot of factors and will depend on your particular design. Series resistors can be used to match the output impedance of the driver to the impedance of the trace when only a single load point is being driven. In this case, the reflection from the receiver is being used to provide the proper voltage swing at the receiver. Obviously this will not work for traces with multiple receivers or multiple drivers. Other SI solutions do not use the series resistor, so that is why they are not part of the chip. However, if your traces are very short, around 3" or less, you may not need the series resistors. With such a short path, the round trip time is much less than the edge transition time and the reflections do not disrupt the circuit so much. In that case you might leave off the resistors without a problem. But I give no guarantees. If you are not concerned with overshoot or undershoot, then you really only need to be concerned with the clock signal. All the other signals on SDRAM are synchronous and are only sampled on the clock edge. If you get severe ringing the worst that can happen is that you need to allow a couple of extra nanoseconds for the signals to settle. Again, no guarantees on the overshoot or undershoot problems. You can simulate your signals if you have a good SI tool. Rick Collins Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAX |