Many thanks to Art Johnson, Thanks for your help and all the informations provided. I misunderstood the SPI functions of the 807. It is the first time I use the SPI. The SPI of 807 is double-buffered.There are two registers for transmission. Shift register and Data transmit register. It allows the user to queue up at most a 32-bit value to send once. --- Art Johnson <> wrote: > The SPI can be set up for anywhere from 2 to 16 bits > as follows: > > // Serial Peripheral Interface Data Size Register > (SPDSR) values > enum dspspi_dsr_values { > > DSPSPI_DSR_ILLEGAL = 0, > DSPSPI_DSR_2_BITS, > DSPSPI_DSR_3_BITS, > DSPSPI_DSR_4_BITS, > DSPSPI_DSR_5_BITS, > DSPSPI_DSR_6_BITS, > DSPSPI_DSR_7_BITS, > DSPSPI_DSR_8_BITS, > DSPSPI_DSR_9_BITS, > DSPSPI_DSR_10_BITS, > DSPSPI_DSR_11_BITS, > DSPSPI_DSR_12_BITS, > DSPSPI_DSR_13_BITS, > DSPSPI_DSR_14_BITS, > DSPSPI_DSR_15_BITS, > DSPSPI_DSR_16_BITS > > }; > > // SPI Status and Control Register (SPSCR) Default > value > // bit 15 is not used > // bit 14 = 0 = Data Shift Order is MSB first > // bit 13 = 0 = SPI Receiver Full Bit (read-only) > // bit 12 = 0 = Error Interrupt is disabled > // bit 11 = 0 = Overflow Bit (read-only) > // bit 10 = 0 = Mode Fault Bit (read-only) > // bit 9 = 0 = SPI Transmitter Empty Bit > (read-only) > // bit 8 = 0 = Mode Fault is disabled > // bits 7:6 = 3 = Baud Rate Divisor (BD) = 32 > // bit 5 = 0 = SPI Receiver Interrupt is > disabled > // bit 4 = 1 = SPI is in Master mode > // bit 3 = 1 = Clock Polarity Bit > // bit 2 = 1 = Clock Phase Bit > // bit 1 = 0 = SPI is disabled > // bit 0 = 0 = SPI Transmit Interrupt is > disabled > #define DSP_SPI_SCR_DFLT_VAL 0x00DC > > // SPI Status and Control Register (SPSCR) Serial > EEPROM value > // bit 15 is not used > // bit 14 = 0 = Data Shift Order is MSB first > // bit 13 = 0 = SPI Receiver Full Bit (read-only) > // bit 12 = 0 = Error Interrupt is disabled > // bit 11 = 0 = Overflow Bit (read-only) > // bit 10 = 0 = Mode Fault Bit (read-only) > // bit 9 = 0 = SPI Transmitter Empty Bit > (read-only) > // bit 8 = 0 = Mode Fault is disabled > // bits 7:6 = 3 = Baud Rate Divisor (BD) = 32 > // bit 5 = 0 = SPI Receiver Interrupt is > disabled > // bit 4 = 1 = SPI is in Master mode > // bit 3 = 1 = Clock Polarity Bit > // bit 2 = 1 = Clock Phase Bit > // bit 1 = 1 = SPI is enabled > // bit 0 = 0 = SPI Transmit Interrupt is > disabled > #define DSP_SPI_SCR_SERW_VAL 0x00DE > > // Set up GPIO Port E bits 4-7 to be the SPI Bus > signals > // SCLK, MOSI, MISO, and /SS. > ArchIO.PortE.PeripheralReg |= 0x00F0; > > // Initialize the DSP chip SPI registers > // Status and Control Register (SPI disabled) > ArchIO.Spi.ControlReg = DSP_SPI_SCR_DFLT_VAL; > // Data Size Register to 8 bits > ArchIO.Spi.DataSizeReg = DSPSPI_DSR_8_BITS; > > // Enable the DSP chip SPI for the Serial EEPROM > // Status and Control Register (SPI enabled) > ArchIO.Spi.ControlReg = DSP_SPI_SCR_SERW_VAL; > > The above code works with the Microchip 25AA040, > which has the > instruction first (8 bits), then the address (8 > bits), then the data (8 > bits). > The I/O pins on the 807 are 5-Volt tolerant, so it > will work OK with the > 5v CPU's UART rxd and txd. > We use the Epson RTC-7301SF Realtime clock chip in > our designs, and it > works very well for us. > Regards, > > Art Johnson > Senior Systems Analyst > PMC Prime Mover Controls Inc. > 3600 Gilmore Way > Burnaby, B.C., Canada > V5G 4R8 > Phone: 604 433-4644 > FAX: 604 433-5570 > Email: > http://www.pmc-controls.com > > -----Original Message----- > From: hao yuan [mailto:] > Sent: Thursday, September 05, 2002 6:59 AM > To: > Subject: [motoroladsp] 56F807's SPI can't access > X5043 > Hi EVeryone! > X5043 is Xicor's uP Supervisor with 4k bit EEprom. > the > interface of X5043 is SPI. But if you want to write > one byte to an address of X5043. You need first > input > the instruction(8 bits) then the Address ( 8 bits) > and > then the Data ( x bits). the 56f807's spi data > length > is only 16bits. So can't save data in X5043. Right? > I > am very sad about that. Any way to prevent changing > the X5043 from the boards. > > The other question is if I connect the SCI0's txd > and > Rxd dirrectly to A 5v CPU's UART rxd and txd. It > is > supplied with 5v , with the same ground with 56f807. > 807's voltage supply is from the same 5v+LDO. the > SCI > will work without any defects? > > Anybody has any good Realtime clock chips most > suitable for 56F807? > > > Many thanks! > Sorry for poor English! > Hao > > > _____________________________________ > Note: If you do a simple "reply" with your email > client, only the author > of this message will receive your answer. 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