Hi,
Those are good news... It would be nice from your part to let us know what
ADI tells you.
Regards,
--
------------------------------
Jaime Andr�s Aranguren Cardona
jaac@sanjaac.com
SanJaaC Electronics
Soluciones en DSP
www.sanjaac.com
"Tony" <none@none.it> escribi� en el mensaje
news:qDQte.24413$b5.1164403@news3.tin.it...
> Jaime Andr�s Aranguren Cardona wrote:
>> Hi,
>>
>> Did you read the anomaly list for your silicon version?
>>
>> JaaC
>>
>
> Thank you very much for your answers.
>
> Analog has just written me, saying that there's an hardware bug in
> ADSP-21364, they asked me to send them my code so they can troubleshoot
> it, and can report a valid solution (in the meanwhile, disabling/enabling
> interrupt can be applied).
>
> :-(
>
Reply by Tony●June 21, 20052005-06-21
Jaime Andr�s Aranguren Cardona wrote:
> Hi,
>
> Did you read the anomaly list for your silicon version?
>
> JaaC
>
Thank you very much for your answers.
Analog has just written me, saying that there's an hardware bug in
ADSP-21364, they asked me to send them my code so they can troubleshoot
it, and can report a valid solution (in the meanwhile,
disabling/enabling interrupt can be applied).
:-(
Reply by ●June 21, 20052005-06-21
Hi,
Did you read the anomaly list for your silicon version?
JaaC
Reply by ●June 20, 20052005-06-20
Hi,
Are you sure that your ISR is not being re-called while within the
processing of a previous entry into the ISR?
Maybe interrupt nesting is enabled, and the ISR is being triggered
faster than it is being attended + processed.
Regards,
JaaC
Reply by Tony●June 19, 20052005-06-19
Hi.
I've a problem with Interrupt Service Routines and Analog Devices DSP
21364. I've written an ISR that moves a sample from an input stream into
a circular buffer, and it's triggered at a fixed rate.
When I execute some code (while ISR is filling a buffer) like this (it's
a Finite Impulse Response Filter part):
lcntr = r2, do (pc,loopend_fir-1) until lce;
f8 = f3*f4, f13 = f8+f13, f4 = dm(i2,m1), f3 = pm(i8,m9);
loopend_fir:
f13=f8+f13, f4 = dm(i2,-2);
it gives me (along a 2048 pts buffer) some wrong results, while if I
disable interrupts before calculus and I enable them after, all goes
right. Only code is affected, ISR deploys samples regularly.
I've ensured that ISR is executed in a transparent way (AFAIK).
The same errors occur in other points of my code. It looks like it has a
random behaviour, but it produces the same results at each try.
How can I solve this issue, without enabling/disabling INTs along my code??
This is only VisualDSP simulation behaviour, but I'll try to ensure a
good result before downloading code on EZ-KIT.
Thank you very much for your support.
(Btw, I've used ADSP-21262 before, and it works correctly even with INTs
enabled).