It seems like you're doing some funny stuff with the clocking.  I recommend
that on the master you make CLKX, FSX, CLKR, and FSR all outputs.  On the
slave you should make them all inputs.  All the transmit pins on the master
are then hooked to all the receive pins on the slave, and all the receive
pins on the master are hooked to the transmit pins on the slave.

So I take it you're planning to let the McBSP run all the time?  How fast
will you be running it?  Do you have a steady stream of data to send?  If
you don't need to send data all the time you may want to configure the McBSP
for SPI operation or else use the SPI peripheral directly.  With all those
interrupts coming in you will lower your processing capabilities
considerably (depending on how often the McBSP generates interrupts).  Make
sure you take advantage of the FIFO in order to reduce the number of context
switches.

Brad

"steph" <island_fr@yahoo.fr> wrote in message
news:2e9a4304.0408161240.58c5ea07@posting.google.com...
> Hye ,
>
> I am using 2 DSPs TMS320F2812, and i am trying to configure them one
> as master , the other as slave for a full duplex communication.
>
> IS the following configuration correct ?
>
> MAster
> -CLKX configured as output and using sampling rate generator
> -CLR configured as input and connected to CLKX of master
> -FSX configured as output and using Frame syncrhoniqtion provided bye
> sampling rate generator
> - FSR configured as input and connected to FSX of master
> -DX connected to DR of slave
> - DR connected to DX of slave
>
> Slave:
> -CLKX configured as input connected to CLKX of Master
> -CLR configured as input and connected to CLKX of master
> -FSX configured as input and connected to FSX of Master
> - FSR configured as input and connected to FSX of master
> -DX connected to DR of MAster
> - DR connected to DX of Master
>
>
> Thank you

Hye ,

I am using 2 DSPs TMS320F2812, and i am trying to configure them one
as master , the other as slave for a full duplex communication.
 
IS the following configuration correct ?

MAster
-CLKX configured as output and using sampling rate generator
-CLR configured as input and connected to CLKX of master
-FSX configured as output and using Frame syncrhoniqtion provided bye
sampling rate generator
- FSR configured as input and connected to FSX of master
-DX connected to DR of slave
- DR connected to DX of slave

Slave:
-CLKX configured as input connected to CLKX of Master      
-CLR configured as input and connected to CLKX of master
-FSX configured as input and connected to FSX of Master 
- FSR configured as input and connected to FSX of master
-DX connected to DR of MAster
- DR connected to DX of Master


Thank you