Hi Roger, here are some answers to your questions.
Regards,
Art Johnson
Senior Systems Analyst
PMC Prime Mover Controls Inc.
3600 Gilmore Way
Burnaby, B.C., Canada
V5G 4R8
Phone: 604 433-4644
FAX: 604 433-5570
Email:
http://www.pmc-controls.com
1. Mixed assembly and C.
The Linker Command File "linker.cmd" determines where data is placed
in memory.
There is one linker.cmd file for each build target, in the
{Project}\configextram and {Project}\configflash directories (and also in
other
build targets if you have created them). The DSP56F805EVM project
timers\configextram linker.cmd file is shown below. All of the data in your
program is put into the ".xExtRAM" area from 0x2000 to 0xDFFF, so you
can see
that there will be no conflict with your other data from 0x0000 to 0x001F
(which
is in the ".xAvailable" area). You should also note that all data
declared
inside a function (other than data declared as "static") is
automatically placed
in the stack area ".xStack" by the CodeWarrior compiler (assuming the
stack
pointer has been set to point to ".xStack"). So, your array
"arr" and the
integers "i" and "j" will be located on the stack.
# Linker.cmd file for DSP56803EVM/DSP56805EVM External RAM
# using both internal and external data memory (EX = 0)
# and using external program memory (Mode = 3)
#*******************************************************************************
MEMORY {
.pInterruptVector (RX) : ORIGIN = 0x0000, LENGTH = 0x0086
.pExtRAM (RWX) : ORIGIN = 0x0086, LENGTH = 0xFF7A
.xAvailable (RW) : ORIGIN = 0x0000, LENGTH = 0x0030
.xCWRegisters (RW) : ORIGIN = 0x0030, LENGTH = 0x0010
.xIntRAM_DynamicMem (RW) : ORIGIN = 0x0040, LENGTH = 0x07C0
.xReserved (R) : ORIGIN = 0x0800, LENGTH = 0x0400
.xPeripherals (RW) : ORIGIN = 0x0C00, LENGTH = 0x0400
.xFlash (R) : ORIGIN = 0x1000, LENGTH = 0x1000
.xExtRAM (RW) : ORIGIN = 0x2000, LENGTH = 0xC000
.xExtRAM_DynamicMem (RW) : ORIGIN = 0xE000, LENGTH = 0x1000
.xStack (RW) : ORIGIN = 0xF000, LENGTH = 0x0F80
.xCoreRegisters (RW) : ORIGIN = 0xFF80, LENGTH = 0x0080
}
#*******************************************************************************
FORCE_ACTIVE {FconfigInterruptVector}
SECTIONS {
#*******************************************************************************
#
# Data (X) Memory Layout
#
_EX_BIT = 0;
# Internal Memory Partitions (for mem.h partitions)
_NUM_IM_PARTITIONS = 1; # IM_ADDR_1 (no IM_ADDR_2 )
# External Memory Partition (for mem.h partitions)
_NUM_EM_PARTITIONS = 1; # EM_ADDR_1
#*******************************************************************************
.ApplicationInterruptVector :
{
vector.c (.text)
} > .pInterruptVector
#*******************************************************************************
.ApplicationCode :
{
# Place all code into Program RAM
* (.text)
* (rtlib.text)
* (fp_engine.text)
* (user.text)
# SDK data to be placed into Program RAM
F_Pdata_start_addr_in_ROM = 0;
F_Pdata_start_addr_in_RAM = .;
pramdata.c (.data)
F_Pdata_ROMtoRAM_length = 0;
F_Pbss_start_addr = .;
_P_BSS_ADDR = .;
pramdata.c (.bss)
F_Pbss_length = . - _P_BSS_ADDR;
} > .pExtRAM
#*******************************************************************************
.ApplicationData :
{
# Define variables for C initialization code
F_Xdata_start_addr_in_ROM = ADDR(.xFlash) + SIZEOF(.xFlash) / 2;
F_StackAddr = ADDR(.xStack);
F_StackEndAddr = ADDR(.xStack) + SIZEOF(.xStack) / 2 - 1;
F_Xdata_start_addr_in_RAM = .;
# Define variables for SDK mem library
FmemEXbit = .;
WRITEH(_EX_BIT);
FmemNumIMpartitions = .;
WRITEH(_NUM_IM_PARTITIONS);
FmemNumEMpartitions = .;
WRITEH(_NUM_EM_PARTITIONS);
FmemIMpartitionList = .;
WRITEH(ADDR(.xIntRAM_DynamicMem));
WRITEH(SIZEOF(.xIntRAM_DynamicMem) / 2);
FmemEMpartitionList = .;
WRITEH(ADDR(.xExtRAM_DynamicMem));
WRITEH(SIZEOF(.xExtRAM_DynamicMem) /2);
# Place rest of the data into External RAM
* (.data)
* (fp_state.data)
* (rtlib.data)
F_Xdata_ROMtoRAM_length = 0;
F_Xbss_start_addr = .;
_X_BSS_ADDR = .;
* (rtlib.bss.lo)
* (rtlib.bss)
* (.bss)
F_Xbss_length = . - _X_BSS_ADDR; # Copy DATA
} > .xExtRAM
#*******************************************************************************
FArchIO = ADDR(.xPeripherals);
FArchCore = ADDR(.xCoreRegisters);
}
2. Fractional arithmetic.
I haven't used this at all so I'll let someone else answer this
question.
3. ISR's
There is an extremely good description of the interrupts in the on-line
documentation. Basically, I just read the documentation, did what they said,
and everything worked perfectly. You can start the on-line manual as follows:
Start
Programs
Motorola
Embedded SDK 2.5
Help and Documentation
In "Contents", go to:
Motorola Embedded SDK
Core Documentation
SDK Programmer's Guide
7 Interrupts
There is a huge amount of information in Chapter 7 Interrupts, far more than
can
reasonably be put into an email. What I did was to print out the whole
document
and read Chapter 7 several times, until I was confident that I thoroughly
understood the subject.
4. SPI
Yes, the SCLK signal stops when there are gaps during transmission. This is
not
a problem because the SPI bus is a synchronous system, so the gaps have no
effect on the slave devices.
We use a software polling routine to determine when the transmission is
completed. Since the SPI bus master is receiving data at the same time as it
is
transmitting, we wait for the SPI Receiver Full Bit (SPRF) to be set, this
only
happens when the data being transmitted has all been sent out. So, to send
out
a multi-byte packet we do the following:
a) Enable the slave device chip select
b) Loop to send each byte (receive timeout aborts the loop):
- Write to the SPI Data Transmit Register (SPDTR)
- Wait (with timeout) for the SPI Receiver Full Bit (SPRF) to be set
- Read from the SPI Data Receive Register (SPDRR)
- exit the loop when all data has been sent/received, or on a receive
timeout
c) Disable the slave device chip select
-----Original Message-----
From: Roger Flor [mailto:]
Sent: Friday, September 20, 2002 12:27 AM
To:
Subject: [motoroladsp] newbie on motorola dsp 56f805
Hello everybody!
This is a very nice discussion group you have.
I am new to the motorola dsp 56f805
I have some questions. If you feel that the answers can be found in the
manuals, please direct me to the proper section.
1. Mixed assembly and C.
Say, I want to code in both C and assembly. Say, I used the first 32 word
of the Data Memory from 0x0000 to 0x001f by doing Move commands
#include <stdio.h>
#include <stdlib.h>
#define SIZE 10
int main(void)
{
int arr[SIZE] = {4,6,7,1,2,3,4,12,4,5};
int i,j;
asm{
move #$1234,X:$0000
; and
; so on
; until
move #$2cdf,X:$001f
}
return(0);
}
The project was started using an EABI stationery.
How do I ensure that there will be no conflict in the use of data memory?
How do I make sure that the array will not use the space from $0000 to
$001f?
2. Fractional arithmetic. According to the manual, fractions can be
represented in the DSP. $4000 can be interpreted as 0.5 . Say, I want to
input filter coefficients in data memory. From the values of the
coefficients, I will get the binary representation and then input them in
memory manually. Is this correct? Is there no other way to input fractional
values? Something that would do it automatically?
number to be represented: 0.0042
binary representation: 0000 0000 1000 1001
Instruction: move #$0089,X:0000
What if I want to represent a number more than the range, say, 100.2418
(decimal). How do I do it?
3. ISR's
Say, I start a project using an EABI stationery. If I have ISR's, is
changing the commands in the 56805vector_pROM.asm and 56805vector_pRAM.asm
the proper way to do it? Say, I am using an interrupt from Timer D Channel
0, is changing:
jmp M56805_intRoutine ; Timer D Channel 0 ($3C)
to:
jmp FMy_interrupt_handler ; Timer D Channel 0 ($3C)
correct? Is this the only way to do it?
4. SPI
When I have gaps during transmissions, when I can not write data as soon as
the SPDTR is empty, does the SCLK signal stop too?
In the dsp56f805 EVM, the DA connected to the SPI has its chip select (/CS)
signal connected to the PB4 GPIO, is using one of the QUAD Timers the only
way to time the assertion and deassertion of the PB4 signal? When the SPTE
is set(Transmit data register is empty), does it mean that transmission is
also finished (i.e. does the slave receive all the bits transmitted right
after the SPTE in the SPSCR is set)?
Thanks and more power to the discussion group
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