I've seen an issue like this before, but found that performing a flush
after
receiving the DMA interrupt solves the problem.
Are you sure this is a real problem and not some issue with the emulator?
Brett.
> -----Original Message-----
> From: adsp@adsp... [mailto:adsp@adsp...] On
> Behalf Of andor_bariska
> Sent: Monday, June 06, 2005 5:32 AM
> To: adsp@adsp...
> Subject: [adsp] External Port DMA
>
> Hi Group,
>
> I'm facing the following oddity: I'm working on a 65L Rev. 0.3.
The
> aim is to download overlay code from 32bit SDRAM into internal 48bit
> PM via external port 1 DMA. In the simulator, this works like a
> charm. However, on the target hardware, the last two instruction
> words are not written into the internal memory (but they are present
> in the SDRAM, I've checked that). The overlay code is written into
> internal memory using one single block transfer.
>
> I've double checked that both internal and external DMA counter,
> index and modifier registers are initialized with the proper values
> (these are generated by the linker, as described in EE-66).
>
> Here comes the odd part: when I do another DMA into PM memory using
> the external port 0 DMA (from the host processor) after the
> incomplete block load, the the missing instructions appear in the
> memory! It seems like the two instruction words are "stuck" in
the
> external port 1 FIFO buffers, and memory writes using the external
> port 0 DMA seems to clear the FIFO. I've tried flushing the external
> port 1 FIFO buffers by writing 0x2000 to the DMAC1 register. Still,
> when I do a external port 0 transfer, the two missing instructions
> appear as if by magic in the PM.
>
> Has anybody made similar experiences? Any workarounds?
>
> Regards,
> Andor
>