No FFT library available for your FPGA?

Q: I'm making a FFT block in hardware (on an FPGA) and I need some
advice on multipliers:

1. I have made a simple (Fixed point arithmetic) Radix-2
Decimation-in-time butterfly block which takes in two 16-bit complex
inputs and another 16-bit input twiddle factor input and produces two
complex outputs. Now with any standard multiplier circuit, multiplying
N bits by N bits gives 2N bit products. However, as twiddle factor
terms are actually Cos()/Sin() terms i.e. lesser than or equal to 1,
one should expect the same no. of bits in the output as in the input.
So what I've done is that I've made a multiplier circuit which simply
neglects (or masks off) N bits from the 2N bit result. This way I can
make a single butterfly which can be cascaded to give 2^n sized
(larger) FFTs. I just wanted to confirm if I'm on the right track...


Am I forgetting something in my implementation or is this sufficient ?

2. Newer FPGAs have multipliers/arithmetic-circuits built into them. Is

there anyway to exploit these internal features without wastage, such
as by masking the higher bits ? 

Thank you, 
Satpreet 
India