It can be done - but you have to be very specific about what you want, and what you can route out. On 10/30/05, Al Clark <aclark@acla...> wrote: > > At 06:32 PM 10/30/2005, you wrote: > >----- Original Message ----- > >From: Jeff Brower <jbrower@jbro...> > >Date: Sunday, October 30, 2005 3:08 pm > >Subject: Re: [adsp] minimum layout question > > > > > > > > Mike makes a good point, but I would extend to its logical > > > conclusion. If > > > you have *any* problem, and ask *any* question on *any* tech group > > > about a > > > 2-layer board, no one is going to help without you first re-doing > > > it as > > > 4-layer. > > > > > > I think sometimes engineers have a really hard time understanding > > > how to > > > truly cost a project. A cheap 2-layer PCB for a yr 2005 DSP is > > > actually a > > > spending extra time and money. > > > >I am not an engineer doing a project but just a > >hobbiest. I have made 4-layer boards though, and > >I also have made 2.4GHz RF boards which were 2 > >layers. > > > >The only time I would consider a 2 layer board for > >a DSP is the specific case where there would be no > >external memory, and only the minimal circuitry > >required to boot up, and also it would have to > >be a hobbiest project, where the R&D budget is > >between the cost of a case of beer and the cost > >of a 4layer protoboard. :) > > > >cheers, > >Jamie > > I have my doubts. I suggest you use 4 layers. If you do try 2, I would use > a lot of fat traces and poured planes. The internal PLL will probably be > very sensitive to layout issues as well as the rest of the DSP. > Al Clark > Danville Signal Processing, Inc. > -------------------------------- > Purveyors of Fine DSP Hardware and other Cool Stuff > Available at http://www.danvillesignal.com > > > > > > > > -Jeff > > > > > > > On Sat, 29 Oct 2005, Jamie Morken wrote: > > > > > > > >> Hi, > > > >> > > > >> I received a couple samples of the ADSP-BF532 > > > >> (TQFP package) from Analog.com <http://Analog.com> and would like > to > > > >> do a very simple 2-layer PCB layout for them. > > > >> I was wondering if I can just hook up the power pins > > > >> and the SPI bus and then load my 32KB max program > > > >> right into the L1 instruction memory cache via SPI? > > > >> > > > >> Are there any other pins I need to hook up for this? > > > >> > > > >> I was also wondering how to set the chip up to > > > >> boot via SPI, I haven't come across that yet in > > > >> the hardware/programming reference manuals. > > > >> > > > >> I don't need external SDRAM and Flash memory at this > > > >> point as I just want a 500MHz 32KB memory > > > >> uber-microcontroller for now :) Also if using > > > >> an external SPI eeprom to load the chip, can that > > > >> chip expand the instruction memory size of the chip > > > >> or does it only load the 32KB on bootup? > > > > > > > > If you really want it to run at 500MHz even internally, you'll > > > need a > > > > ground plane and a power plane. You could run bus bar by hand > > > over all > > > > the power pins if it really is too expensive to put in power > > > planes, but > > > > that takes a lot of time so it's a fair tradeoff. It just won't > > > work> otherwise. > > > > > > > > Patience, persistence, truth, > > > > Dr. mike > > > > > > > > > > > > > > > > >

At 06:32 PM 10/30/2005, you wrote: >----- Original Message ----- >From: Jeff Brower <jbrower@jbro...> >Date: Sunday, October 30, 2005 3:08 pm >Subject: Re: [adsp] minimum layout question > > > > > Mike makes a good point, but I would extend to its logical > > conclusion. If > > you have *any* problem, and ask *any* question on *any* tech group > > about a > > 2-layer board, no one is going to help without you first re-doing > > it as > > 4-layer. > > > > I think sometimes engineers have a really hard time understanding > > how to > > truly cost a project. A cheap 2-layer PCB for a yr 2005 DSP is > > actually a > > spending extra time and money. > >I am not an engineer doing a project but just a >hobbiest. I have made 4-layer boards though, and >I also have made 2.4GHz RF boards which were 2 >layers. > >The only time I would consider a 2 layer board for >a DSP is the specific case where there would be no >external memory, and only the minimal circuitry >required to boot up, and also it would have to >be a hobbiest project, where the R&D budget is >between the cost of a case of beer and the cost >of a 4layer protoboard. :) > >cheers, >Jamie I have my doubts. I suggest you use 4 layers. If you do try 2, I would use a lot of fat traces and poured planes. The internal PLL will probably be very sensitive to layout issues as well as the rest of the DSP. Al Clark Danville Signal Processing, Inc. -------------------------------- Purveyors of Fine DSP Hardware and other Cool Stuff Available at http://www.danvillesignal.com > > > > -Jeff > > > > > On Sat, 29 Oct 2005, Jamie Morken wrote: > > > > > >> Hi, > > >> > > >> I received a couple samples of the ADSP-BF532 > > >> (TQFP package) from Analog.com and would like to > > >> do a very simple 2-layer PCB layout for them. > > >> I was wondering if I can just hook up the power pins > > >> and the SPI bus and then load my 32KB max program > > >> right into the L1 instruction memory cache via SPI? > > >> > > >> Are there any other pins I need to hook up for this? > > >> > > >> I was also wondering how to set the chip up to > > >> boot via SPI, I haven't come across that yet in > > >> the hardware/programming reference manuals. > > >> > > >> I don't need external SDRAM and Flash memory at this > > >> point as I just want a 500MHz 32KB memory > > >> uber-microcontroller for now :) Also if using > > >> an external SPI eeprom to load the chip, can that > > >> chip expand the instruction memory size of the chip > > >> or does it only load the 32KB on bootup? > > > > > > If you really want it to run at 500MHz even internally, you'll > > need a > > > ground plane and a power plane. You could run bus bar by hand > > over all > > > the power pins if it really is too expensive to put in power > > planes, but > > > that takes a lot of time so it's a fair tradeoff. It just won't > > work> otherwise. > > > > > > Patience, persistence, truth, > > > Dr. mike > > > >

----- Original Message ----- From: Jeff Brower <jbrower@jbro...> Date: Sunday, October 30, 2005 3:08 pm Subject: Re: [adsp] minimum layout question > > Mike makes a good point, but I would extend to its logical > conclusion. If > you have *any* problem, and ask *any* question on *any* tech group > about a > 2-layer board, no one is going to help without you first re-doing > it as > 4-layer. > > I think sometimes engineers have a really hard time understanding > how to > truly cost a project. A cheap 2-layer PCB for a yr 2005 DSP is > actually a > spending extra time and money. I am not an engineer doing a project but just a hobbiest. I have made 4-layer boards though, and I also have made 2.4GHz RF boards which were 2 layers. The only time I would consider a 2 layer board for a DSP is the specific case where there would be no external memory, and only the minimal circuitry required to boot up, and also it would have to be a hobbiest project, where the R&D budget is between the cost of a case of beer and the cost of a 4layer protoboard. :) cheers, Jamie > > -Jeff > > > On Sat, 29 Oct 2005, Jamie Morken wrote: > > > >> Hi, > >> > >> I received a couple samples of the ADSP-BF532 > >> (TQFP package) from Analog.com and would like to > >> do a very simple 2-layer PCB layout for them. > >> I was wondering if I can just hook up the power pins > >> and the SPI bus and then load my 32KB max program > >> right into the L1 instruction memory cache via SPI? > >> > >> Are there any other pins I need to hook up for this? > >> > >> I was also wondering how to set the chip up to > >> boot via SPI, I haven't come across that yet in > >> the hardware/programming reference manuals. > >> > >> I don't need external SDRAM and Flash memory at this > >> point as I just want a 500MHz 32KB memory > >> uber-microcontroller for now :) Also if using > >> an external SPI eeprom to load the chip, can that > >> chip expand the instruction memory size of the chip > >> or does it only load the 32KB on bootup? > > > > If you really want it to run at 500MHz even internally, you'll > need a > > ground plane and a power plane. You could run bus bar by hand > over all > > the power pins if it really is too expensive to put in power > planes, but > > that takes a lot of time so it's a fair tradeoff. It just won't > work> otherwise. > > > > Patience, persistence, truth, > > Dr. mike > > >

Mike makes a good point, but I would extend to its logical conclusion. If you have *any* problem, and ask *any* question on *any* tech group about a 2-layer board, no one is going to help without you first re-doing it as 4-layer. I think sometimes engineers have a really hard time understanding how to truly cost a project. A cheap 2-layer PCB for a yr 2005 DSP is actually a spending extra time and money. -Jeff > On Sat, 29 Oct 2005, Jamie Morken wrote: > >> Hi, >> >> I received a couple samples of the ADSP-BF532 >> (TQFP package) from Analog.com and would like to >> do a very simple 2-layer PCB layout for them. >> I was wondering if I can just hook up the power pins >> and the SPI bus and then load my 32KB max program >> right into the L1 instruction memory cache via SPI? >> >> Are there any other pins I need to hook up for this? >> >> I was also wondering how to set the chip up to >> boot via SPI, I haven't come across that yet in >> the hardware/programming reference manuals. >> >> I don't need external SDRAM and Flash memory at this >> point as I just want a 500MHz 32KB memory >> uber-microcontroller for now :) Also if using >> an external SPI eeprom to load the chip, can that >> chip expand the instruction memory size of the chip >> or does it only load the 32KB on bootup? > > If you really want it to run at 500MHz even internally, you'll need a > ground plane and a power plane. You could run bus bar by hand over all > the power pins if it really is too expensive to put in power planes, but > that takes a lot of time so it's a fair tradeoff. It just won't work > otherwise. > > Patience, persistence, truth, > Dr. mike >

On Sun, 30 Oct 2005, Jamie Morken wrote: > > With the TQFP package (unlike with the BGA) there is > the ability to put a large ground plane under the > chip on the top layer of the board, and decouple > each power pin with caps on the bottom layer of the > board. > > Definetely not as good as 4 layers but it may be > sufficient and it is cheap enough to be worth a try > I think, and there is always the option of limiting > the clock speed via software I think. (I have to > check that in the manual!) Yeah, if you can run it at 100, then 200, then 350 you'll see which problems really matter. Definitly worth a try, that's for sure! Good luck and have fun - now that it's getting dark most of the day it should be a good project :-) Patience, persistence, truth, Dr. mike

----- Original Message ----- From: Mike Rosing <eresrch@eres...> Date: Sunday, October 30, 2005 1:11 pm Subject: Re: [adsp] minimum layout question > If you really want it to run at 500MHz even internally, you'll > need a > ground plane and a power plane. You could run bus bar by hand > over all > the power pins if it really is too expensive to put in power > planes, but > that takes a lot of time so it's a fair tradeoff. It just won't work > otherwise. With the TQFP package (unlike with the BGA) there is the ability to put a large ground plane under the chip on the top layer of the board, and decouple each power pin with caps on the bottom layer of the board. Definetely not as good as 4 layers but it may be sufficient and it is cheap enough to be worth a try I think, and there is always the option of limiting the clock speed via software I think. (I have to check that in the manual!) ps. Anyone have an eagle cad library part for this chip? cheers, Jamie > > Patience, persistence, truth, > Dr. mike

On Sat, 29 Oct 2005, Jamie Morken wrote: > Hi, > > I received a couple samples of the ADSP-BF532 > (TQFP package) from Analog.com and would like to > do a very simple 2-layer PCB layout for them. > I was wondering if I can just hook up the power pins > and the SPI bus and then load my 32KB max program > right into the L1 instruction memory cache via SPI? > > Are there any other pins I need to hook up for this? > > I was also wondering how to set the chip up to > boot via SPI, I haven't come across that yet in > the hardware/programming reference manuals. > > I don't need external SDRAM and Flash memory at this > point as I just want a 500MHz 32KB memory > uber-microcontroller for now :) Also if using > an external SPI eeprom to load the chip, can that > chip expand the instruction memory size of the chip > or does it only load the 32KB on bootup? If you really want it to run at 500MHz even internally, you'll need a ground plane and a power plane. You could run bus bar by hand over all the power pins if it really is too expensive to put in power planes, but that takes a lot of time so it's a fair tradeoff. It just won't work otherwise. Patience, persistence, truth, Dr. mike

Hi, I received a couple samples of the ADSP-BF532 (TQFP package) from Analog.com and would like to do a very simple 2-layer PCB layout for them. I was wondering if I can just hook up the power pins and the SPI bus and then load my 32KB max program right into the L1 instruction memory cache via SPI? Are there any other pins I need to hook up for this? I was also wondering how to set the chip up to boot via SPI, I haven't come across that yet in the hardware/programming reference manuals. I don't need external SDRAM and Flash memory at this point as I just want a 500MHz 32KB memory uber-microcontroller for now :) Also if using an external SPI eeprom to load the chip, can that chip expand the instruction memory size of the chip or does it only load the 32KB on bootup? cheers, Jamie