hi, yes, you are correct that one dma channel is limited to transfer of 64kb at a time. but you can implement a dma chaining as follows: suppose channel0 interrupts the cpu after the completion of the stipulated 64kb. In the interrupt service routine, we can start a second dma channel,for example channel1 for another 64kb of transfer. you can continue like this untill all your data is transferred. in case, if you do not have any other second dma channels available in dsp, you may infrom the arm processor and if possible, arm can initiate the secondary dma transfers. i am not very sure about the feasibility of the second method as i dont know much about the arm architecture. its my bold guess that it also has a dma controller. regards, Dileepan. --- Harland Christofferson <> wrote: > > > But, as I think is true w/ all C55x DSPs, your DMA > channel is limited > to a 64KB boundary. > > At Monday, 10 January 2005, Dileepan C > <> wrote: > > >hi, > > > >i am not an expert in omap. but i have basic > knowledge > >of the c55x.you can use the dma in c55x for the > data > >transfer. the dam can be triggered by an interrupt > or > >by certain sync events. > > > >you can also refer docs like spra899,spra891 and > >spra883. > > > >regards, > >Dileepan. > > > >--- garlordembed <> wrote: > > > >> > >> > >> hi,all > >> > >> i am evaluating large block data transfering > >> between arm and dsp. > >> > >> arm side memory=====================>dsp side > >> memory > >> > >> how ever i want dsp side to be a master and > start > >> a new transfer. > >> > >> which is the best method can bring largest > >> throughput ? probaly > >> least bus arbitray leads to that? > >> > >> > >> thank you! ---------------------------------- > Zero Crossings, Inc. -- Embedded and Digital Signal > Processing Systems > > http://www.zerocrossings.com/ > > __________________________________________________ |