hi,
      one of my collegue implemented that. i did not. i have to
optimize that. so, i did not have idea how they implemented it. try on
google u will get assembly code of viterbi decoder on adsp2191. try to
implement the same way on blackfin.


billh40@aol.com wrote:
> inaganti.sunil@gmail.com wrote:
> > hi,
> >        i have implemnet soft decision viterbi decoder of
> > constraintlength 7 on adsp black fin processor.
> >                   can anybody sugegst some document regarding
> > implementation on ADSP. i know the theory of viterbi decoder. I already
> > implemenetd hard decision decoder on FPGA. Whether register excahneg
> > algorithm is good or trace-back is good for DSP implementation. I wnat
> > to know some information on calculation of eucldian distance for soft
> > decision based on canstellation.
> >
> > regrads,
> > sunil
>
>       I am interested in implementing the Viterbi decoder on the
> Blackfin 535.
> Did you code it in assembler? What is the thru-put that you obtained?
> My data rate is only 50 Bits per sec for 12 channels.
> 
> Thanks for your help,
> Bill Hanna

inaganti.sunil@gmail.com wrote:
> hi,
>        i have implemnet soft decision viterbi decoder of
> constraintlength 7 on adsp black fin processor.
>                   can anybody sugegst some document regarding
> implementation on ADSP. i know the theory of viterbi decoder. I already
> implemenetd hard decision decoder on FPGA. Whether register excahneg
> algorithm is good or trace-back is good for DSP implementation. I wnat
> to know some information on calculation of eucldian distance for soft
> decision based on canstellation.
>
> regrads,
> sunil

      I am interested in implementing the Viterbi decoder on the
Blackfin 535.
Did you code it in assembler? What is the thru-put that you obtained?
My data rate is only 50 Bits per sec for 12 channels.

Thanks for your help,
Bill Hanna

hi,
       i have implemnet soft decision viterbi decoder of
constraintlength 7 on adsp black fin processor.
                  can anybody sugegst some document regarding
implementation on ADSP. i know the theory of viterbi decoder. I already
implemenetd hard decision decoder on FPGA. Whether register excahneg
algorithm is good or trace-back is good for DSP implementation. I wnat
to know some information on calculation of eucldian distance for soft
decision based on canstellation.
       
regrads,
sunil