Reply by canbruce_contact ●June 7, 20072007-06-07
_____________________________________________________________________
SPORT Transmit Example: Uses the feature in which the ADSP-2106x
core
will stall when attempting to write to a full TX register. This
example
sets up a loop to transmit the data in the data buffer "source".
_____________________________________________________________________
___*/
#define N 8
#include "def21060.h"

.section/dm seg_dmda; /* Data segment name described in arch.
file.*/
.var source[N]= 0x11111111, 0x22222222, 0x33333333, 0x44444444,
0x55555555, 0x66666666, 0x77777777, 0x88888888;

/*__________________Main routine__________________*/
.section/pm seg_pmco; /* Main code segment from arch file.*/
start: r0=0x00270007; /* TDIV0 Register:TCLKDIV=7, TFSDIV=39*/
dm(TDIV0)=r0; /* sclock=CLKIN/8, framerate=sclock/20.*/
r0=0x000065f1; /* STCTL0 Register:*/
dm(STCTL0)=r0; /* SPEN=1,(SPORT enabled)*/
/* SLEN=31 (32-bit word)*/
/* ICLK=1, (internal tx clock)*/
/* TFSR=1, (require TFS)*/
/* ITFS=1, (internal TFS)*/
/* DITFS=0,(data dependent FS), all other
bits=0*/

b0=source; /* Pointer to source. i0=b0 automatically.*/
l0=@source;

lcntr=N, do tx_loop until lce;
r0=dm(i0,1); /* Get data from source buffer*/
tx_loop: dm(TX0)=r0; /* Write transmit register, core will wait
until*/
/* SPORT output buffer is not full.*/
idle;

A MODIFIED VERSON WHICH WORK ON ADSP21061 SIMULATOR
/*___________________________________________________________________
_____
SPORT Transmit Example: Uses the feature in which the ADSP-2106x
core
will stall when attempting to write to a full TX register. This
example
sets up a loop to transmit the data in the data buffer "source".
_____________________________________________________________________
___*/
#define N 8 // 8th no of data to be transmitted

#include "def21060.h"
//DATA SEGMENT
.section/dm seg_dmda;
.var source[N]= 0x11111111, 0x22222222, 0x33333333, 0x44444444,
0x55555555, 0x66666666, 0x77777777, 0x88888888;

/*__________________Main routine CODE SEGMENT__________________*/
.section/pm seg_pmco; /* Main code segment from arch file.*/
start: r0=0x00270007; /* TDIV0 Register:TCLKDIV=7, TFSDIV=39*/
dm(TDIV1)=r0;
dm(RDIV1)=r0;/* sclock=CLKIN/8, framerate=sclock/20.*/

r0=0x000065f1; /* STCTL0 Register:*/
dm(STCTL1)=r0; /* SPEN=1,(SPORT enabled)*/
r0=0x0040e5f1; //IF I USE 0XOOOOE5F1 IN SIMULATION
//PORT DOES NOT
EXIST OR OPEN COMES
//BUT RUNS ON
ADSP21061 EZ-KIT LITEVIA
// HPPCI "e
instead of expected 6"
dm(SRCTL1)=r0; /* SLEN=31 (32-bit word)*/
/* ICLK=1, (internal tx clock)*/
/* TFSR=1, (require TFS)*/
/* ITFS=1, (internal TFS)*/
/* DITFS=0,(data dependent FS), all other
bits=0*/
//IMODE=1 (THIS SOLVES THE
PROBLEM)
//WHAT DOES RECEIVE COMPARISON
ENABLE DO
//this bit is in adsp 21061 only
//LOOPBACK MODE ENABLE
b0=source; /* Pointer to source. i0=b0 automatically.*/
l0=@source;

lcntr=N, do tx_loop until lce;
r0=dm(i0,1); /* Get data from source buffer*/
tx_loop: dm(TX1)=r0; /* Write transmit register, core will wait
until*/
/* SPORT output buffer is not full.*/
idle;//PROCESSOR WAIT FOR INTERRUPT
Thanking all in advance..
canbruce