You can't do it any faster. Every clock cycle uses the address and data
bus. Every memory location is a specific address and you must clock some
data into each address if you want to ensure an initialized state.
If you want to speed things up you can reduce the number of wait states,
but then you may not accurately write data to SDRAM.
Patience, persistence, truth,
Dr. mike
On Mon, 14 Jun 2010, i...@gmail.com wrote:
> Hi all,
>
> can anyone suggest me an easy way to implement the below code with lower
MIPS???
> i am using analog devices processor.
>
> block size is 64(assume)
> i5 = 0x300000;(points to SDRAM)
>
> Lcntr000*8,do Initial until lce;
> Initial :dm(i5,m6)=m14;
>
> MIPS = (cycle count*fs)/(block size * 1000000)
>