At 10:41 AM 3/8/02 -0600, C.W. wrote: >As in they can't find any evidence it exists so there is no documentation >on it? Or they know it exists but haven't been able to nail it down and >product documentation? Or??? They know it exists. They know what causes it. They have several workarounds. They have documented it. The documentation is not public. >At 01:23 PM 03/08/02 +0000, andrew_elder wrote: > >>Ok, I heard back from TI. They don't have proper public documentation >>on this C6711 EDMA problem. If you are interested in discussing with >>TI please email me and I will pass it on to TI. >> >>Thanks, >>Andrew >> >>--- In c6x@y..., Andrew Elder <andrew_elder@b...> wrote: >> > >> > I haven't yet seen any public documentation on the issue. I've just >>sent TI an >> > email to try to get a reference number (or something) for the issue. >> > >> > Andrew >> > >> > At 05:23 PM 2/27/02 -0500, Steve Thornhill wrote: >> > >Does TI have any technical documentation on this silicon bug? >> > >I'm working on a project that could be adversely affected by this. >> > > >> > >Steve >> > > >> > >-----Original Message----- >> > >From: Andrew Elder [mailto:andrew_elder@b...] >> > >Sent: Wednesday, February 27, 2002 10:06 AM >> > >To: c6x@y... >> > >Subject: RE: [c6x] McBSPs on 100MHz >> > > >> > > >> > > >> > >All, >> > > >> > >The C6711 has a silicon design bug that can cause EDMA transfers >>to be missed. >> > >The problem occurs when the cache controller takes over the EDMA >>controller >> > (it >> > >always has priority) thereby preventing EDMA <-> McBSP transfers. >>If code >> > >generates an L1P miss followed by several L2 cache misses the >>cache controller >> > >can take over the EDMA subsystem. An example of the sort of >>operation that can >> > >cause this is memcpy(). >> > > >> > >Our company spent about 6 months tracking this one down. I'd hate >>someone else >> > >to have to repeat the experience. >> > > >> > >Andrew E. >> > > >> > > >> > > >> > >At 01:29 PM 2/27/02 +0000, Martin.J Thompson wrote: >> > >>>Martin, >> > >>> >> > >>>Did you encountered problems on that? >> > >>> >> > >> >> > >>Not so far. >> > >> >> > >>>On the C6711 you can use the EDMA, isn't it? On the C6203 it is >>still the >> > >>>DMA... >> > >>> >> > >>>Do you have any idea about the CPU-load you had? >> > >>> >> > >> >> > >>Not too heavily loaded, probably around 50%. >> > >> >> > >>>I'm asking this 'cause I'm not sure if the C6203 can handle 2 >>full-speed >> > >>>McBSP@100MHz connected to DMA... >> > >>> >> > >> >> > >>That would depend on things like frame-size, whether it's going >>to external >> > >>memory and so forth I imagine. >> > >> >> > >>Cheers, >> > >>Martin >> > >> >> > >>> >> > >>>-----Original Message----- >> > >>>From: Martin.J Thompson [mailto:Martin.J.Thompson@t...] >> > >>>Sent: woensdag 27 februari 2002 9:29 >> > >>>To: jan.asselman@s...; c6x@y... >> > >>>Subject: Re: [c6x] McBSPs on 100MHz >> > >>> >> > >>> >> > >>>I've done 75Mhz on a C6711 @150MHz core clock. >> > >>> >> > >>>Cheers, >> > >>>Martin >> > >>> >> > >>>-- >> > >>>Martin Thompson BEng(Hons) CEng MIEE >> > >>>TRW Conekt >> > >>>Stratford Road, Solihull, B90 4GW. UK >> > >>>Tel: +44 (0)121-627-3569 - martin.j.thompson@t... >> > >>> >> > >>> >> > >>>>>> Asselman Jan <jan.asselman@s...> 26 February 2002 16:50:01 >> > >>>>>> >> > >>>Hi, >> > >>> >> > >>>I'm wondering, has anyone experience using the McBSP on speeds >>as high as >> > >>>75,100 or 150MHz. I'm using the C6203@300MHz. I try to figure >>out what the >> > >>>maximum speed is on the McBSP if it uses the internal clock >>source. >> > >>> >> > >>>In the TI peripheral guide, it is stated that "The maximum bit >>rate for the >> > >>>C6203B/03C device is 100 Mbps or CPU/2 (the slower of the >>two). " >> > >>> >> > >>>But I'm not sure I can use more than 75MHz... >> > >>> >> > >>>Any ideas? >> > >>> >> > >>>Jan >> > >>> >> > >>> >> > > >> > > >> > >_____________________________________ >> > >Note: If you do a simple "reply" with your email client, only the >>author of >> > >this message will receive your answer. You need to do a "reply >>all" if you >> > >want your answer to be distributed to the entire group. >> > > >> > >_____________________________________ >> > >About this discussion group: >> > > >> > >To Join: Send an email to c6x-subscribe@y... >> > > >> > >To Post: Send an email to c6x@y... >> > > >> > >To Leave: Send an email to c6x-unsubscribe@y... >> > > >> > >Archives: http://www.yahoogroups.com/group/c6x >> > > >> > >Other Groups: http://www.dsprelated.com >> > > >> > > >> > >">http://docs.yahoo.com/info/terms/ >> > > >> > > >> > > >> > > >> > >_____________________________________ >> > >Note: If you do a simple "reply" with your email client, only the >>author of >> > >this message will receive your answer. You need to do a "reply >>all" if you >> > >want your answer to be distributed to the entire group. >> > > >> > >_____________________________________ >> > >About this discussion group: >> > > >> > >To Join: Send an email to c6x-subscribe@y... >> > > >> > >To Post: Send an email to c6x@y... >> > > >> > >To Leave: Send an email to c6x-unsubscribe@y... >> > > >> > >Archives: http://www.yahoogroups.com/group/c6x >> > > >> > >Other Groups: http://www.dsprelated.com >> > > >> > > >> > >">http://docs.yahoo.com/info/terms/ >> > > >> > > >> >> >>_____________________________________ >>Note: If you do a simple "reply" with your email client, only the author >>of this message will receive your answer. You need to do a "reply all" if >>you want your answer to be distributed to the entire group. >> >>_____________________________________ >>About this discussion group: >> >>To Join: Send an email to >> >>To Post: Send an email to >> >>To Leave: Send an email to >> >>Archives: http://www.yahoogroups.com/group/c6x >> >>Other Groups: http://www.dsprelated.com >> >> >>">http://docs.yahoo.com/info/terms/ >

As in they can't find any evidence it exists so there is no documentation on it? Or they know it exists but haven't been able to nail it down and product documentation? Or??? At 01:23 PM 03/08/02 +0000, andrew_elder wrote: >Ok, I heard back from TI. They don't have proper public documentation >on this C6711 EDMA problem. If you are interested in discussing with >TI please email me and I will pass it on to TI. > >Thanks, >Andrew > >--- In c6x@y..., Andrew Elder <andrew_elder@b...> wrote: > > > > I haven't yet seen any public documentation on the issue. I've just >sent TI an > > email to try to get a reference number (or something) for the issue. > > > > Andrew > > > > At 05:23 PM 2/27/02 -0500, Steve Thornhill wrote: > > >Does TI have any technical documentation on this silicon bug? > > >I'm working on a project that could be adversely affected by this. > > > > > >Steve > > > > > >-----Original Message----- > > >From: Andrew Elder [mailto:andrew_elder@b...] > > >Sent: Wednesday, February 27, 2002 10:06 AM > > >To: c6x@y... > > >Subject: RE: [c6x] McBSPs on 100MHz > > > > > > > > > > > >All, > > > > > >The C6711 has a silicon design bug that can cause EDMA transfers >to be missed. > > >The problem occurs when the cache controller takes over the EDMA >controller > > (it > > >always has priority) thereby preventing EDMA <-> McBSP transfers. >If code > > >generates an L1P miss followed by several L2 cache misses the >cache controller > > >can take over the EDMA subsystem. An example of the sort of >operation that can > > >cause this is memcpy(). > > > > > >Our company spent about 6 months tracking this one down. I'd hate >someone else > > >to have to repeat the experience. > > > > > >Andrew E. > > > > > > > > > > > >At 01:29 PM 2/27/02 +0000, Martin.J Thompson wrote: > > >>>Martin, > > >>> > > >>>Did you encountered problems on that? > > >>> > > >> > > >>Not so far. > > >> > > >>>On the C6711 you can use the EDMA, isn't it? On the C6203 it is >still the > > >>>DMA... > > >>> > > >>>Do you have any idea about the CPU-load you had? > > >>> > > >> > > >>Not too heavily loaded, probably around 50%. > > >> > > >>>I'm asking this 'cause I'm not sure if the C6203 can handle 2 >full-speed > > >>>McBSP@100MHz connected to DMA... > > >>> > > >> > > >>That would depend on things like frame-size, whether it's going >to external > > >>memory and so forth I imagine. > > >> > > >>Cheers, > > >>Martin > > >> > > >>> > > >>>-----Original Message----- > > >>>From: Martin.J Thompson [mailto:Martin.J.Thompson@t...] > > >>>Sent: woensdag 27 februari 2002 9:29 > > >>>To: jan.asselman@s...; c6x@y... > > >>>Subject: Re: [c6x] McBSPs on 100MHz > > >>> > > >>> > > >>>I've done 75Mhz on a C6711 @150MHz core clock. > > >>> > > >>>Cheers, > > >>>Martin > > >>> > > >>>-- > > >>>Martin Thompson BEng(Hons) CEng MIEE > > >>>TRW Conekt > > >>>Stratford Road, Solihull, B90 4GW. UK > > >>>Tel: +44 (0)121-627-3569 - martin.j.thompson@t... > > >>> > > >>> > > >>>>>> Asselman Jan <jan.asselman@s...> 26 February 2002 16:50:01 > > >>>>>> > > >>>Hi, > > >>> > > >>>I'm wondering, has anyone experience using the McBSP on speeds >as high as > > >>>75,100 or 150MHz. I'm using the C6203@300MHz. I try to figure >out what the > > >>>maximum speed is on the McBSP if it uses the internal clock >source. > > >>> > > >>>In the TI peripheral guide, it is stated that "The maximum bit >rate for the > > >>>C6203B/03C device is 100 Mbps or CPU/2 (the slower of the >two). " > > >>> > > >>>But I'm not sure I can use more than 75MHz... > > >>> > > >>>Any ideas? > > >>> > > >>>Jan > > >>> > > >>> > > > > > > > > >_____________________________________ > > >Note: If you do a simple "reply" with your email client, only the >author of > > >this message will receive your answer. You need to do a "reply >all" if you > > >want your answer to be distributed to the entire group. > > > > > >_____________________________________ > > >About this discussion group: > > > > > >To Join: Send an email to c6x-subscribe@y... > > > > > >To Post: Send an email to c6x@y... > > > > > >To Leave: Send an email to c6x-unsubscribe@y... > > > > > >Archives: http://www.yahoogroups.com/group/c6x > > > > > >Other Groups: http://www.dsprelated.com > > > > > > > > >">http://docs.yahoo.com/info/terms/ > > > > > > > > > > > > > > >_____________________________________ > > >Note: If you do a simple "reply" with your email client, only the >author of > > >this message will receive your answer. You need to do a "reply >all" if you > > >want your answer to be distributed to the entire group. > > > > > >_____________________________________ > > >About this discussion group: > > > > > >To Join: Send an email to c6x-subscribe@y... > > > > > >To Post: Send an email to c6x@y... > > > > > >To Leave: Send an email to c6x-unsubscribe@y... > > > > > >Archives: http://www.yahoogroups.com/group/c6x > > > > > >Other Groups: http://www.dsprelated.com > > > > > > > > >">http://docs.yahoo.com/info/terms/ > > > > > >_____________________________________ >Note: If you do a simple "reply" with your email client, only the author >of this message will receive your answer. You need to do a "reply all" if >you want your answer to be distributed to the entire group. > >_____________________________________ >About this discussion group: > >To Join: Send an email to > >To Post: Send an email to > >To Leave: Send an email to > >Archives: http://www.yahoogroups.com/group/c6x > >Other Groups: http://www.dsprelated.com >">http://docs.yahoo.com/info/terms/

Ok, I heard back from TI. They don't have proper public documentation on this C6711 EDMA problem. If you are interested in discussing with TI please email me and I will pass it on to TI. Thanks, Andrew --- In c6x@y..., Andrew Elder <andrew_elder@b...> wrote: > > I haven't yet seen any public documentation on the issue. I've just sent TI an > email to try to get a reference number (or something) for the issue. > > Andrew > > At 05:23 PM 2/27/02 -0500, Steve Thornhill wrote: > >Does TI have any technical documentation on this silicon bug? > >I'm working on a project that could be adversely affected by this. > > > >Steve > > > >-----Original Message----- > >From: Andrew Elder [mailto:andrew_elder@b...] > >Sent: Wednesday, February 27, 2002 10:06 AM > >To: c6x@y... > >Subject: RE: [c6x] McBSPs on 100MHz > > > > > > > >All, > > > >The C6711 has a silicon design bug that can cause EDMA transfers to be missed. > >The problem occurs when the cache controller takes over the EDMA controller > (it > >always has priority) thereby preventing EDMA <-> McBSP transfers. If code > >generates an L1P miss followed by several L2 cache misses the cache controller > >can take over the EDMA subsystem. An example of the sort of operation that can > >cause this is memcpy(). > > > >Our company spent about 6 months tracking this one down. I'd hate someone else > >to have to repeat the experience. > > > >Andrew E. > > > > > > > >At 01:29 PM 2/27/02 +0000, Martin.J Thompson wrote: > >>>Martin, > >>> > >>>Did you encountered problems on that? > >>> > >> > >>Not so far. > >> > >>>On the C6711 you can use the EDMA, isn't it? On the C6203 it is still the > >>>DMA... > >>> > >>>Do you have any idea about the CPU-load you had? > >>> > >> > >>Not too heavily loaded, probably around 50%. > >> > >>>I'm asking this 'cause I'm not sure if the C6203 can handle 2 full-speed > >>>McBSP@100MHz connected to DMA... > >>> > >> > >>That would depend on things like frame-size, whether it's going to external > >>memory and so forth I imagine. > >> > >>Cheers, > >>Martin > >> > >>> > >>>-----Original Message----- > >>>From: Martin.J Thompson [mailto:Martin.J.Thompson@t...] > >>>Sent: woensdag 27 februari 2002 9:29 > >>>To: jan.asselman@s...; c6x@y... > >>>Subject: Re: [c6x] McBSPs on 100MHz > >>> > >>> > >>>I've done 75Mhz on a C6711 @150MHz core clock. > >>> > >>>Cheers, > >>>Martin > >>> > >>>-- > >>>Martin Thompson BEng(Hons) CEng MIEE > >>>TRW Conekt > >>>Stratford Road, Solihull, B90 4GW. UK > >>>Tel: +44 (0)121-627-3569 - martin.j.thompson@t... > >>> > >>> > >>>>>> Asselman Jan <jan.asselman@s...> 26 February 2002 16:50:01 > >>>>>> > >>>Hi, > >>> > >>>I'm wondering, has anyone experience using the McBSP on speeds as high as > >>>75,100 or 150MHz. I'm using the C6203@300MHz. I try to figure out what the > >>>maximum speed is on the McBSP if it uses the internal clock source. > >>> > >>>In the TI peripheral guide, it is stated that "The maximum bit rate for the > >>>C6203B/03C device is 100 Mbps or CPU/2 (the slower of the two). " > >>> > >>>But I'm not sure I can use more than 75MHz... > >>> > >>>Any ideas? > >>> > >>>Jan > >>> > >>> > > > > > >_____________________________________ > >Note: If you do a simple "reply" with your email client, only the author of > >this message will receive your answer. You need to do a "reply all" if you > >want your answer to be distributed to the entire group. > > > >_____________________________________ > >About this discussion group: > > > >To Join: Send an email to c6x-subscribe@y... > > > >To Post: Send an email to c6x@y... > > > >To Leave: Send an email to c6x-unsubscribe@y... > > > >Archives: http://www.yahoogroups.com/group/c6x > > > >Other Groups: http://www.dsprelated.com > > > > > >">http://docs.yahoo.com/info/terms/ > > > > > > > > > >_____________________________________ > >Note: If you do a simple "reply" with your email client, only the author of > >this message will receive your answer. You need to do a "reply all" if you > >want your answer to be distributed to the entire group. > > > >_____________________________________ > >About this discussion group: > > > >To Join: Send an email to c6x-subscribe@y... > > > >To Post: Send an email to c6x@y... > > > >To Leave: Send an email to c6x-unsubscribe@y... > > > >Archives: http://www.yahoogroups.com/group/c6x > > > >Other Groups: http://www.dsprelated.com > > > > > >">http://docs.yahoo.com/info/terms/ > > > >

I haven't yet seen any public documentation on the issue. I've just sent TI an email to try to get a reference number (or something) for the issue. Andrew At 05:23 PM 2/27/02 -0500, Steve Thornhill wrote: >Does TI have any technical documentation on this silicon bug? >I'm working on a project that could be adversely affected by this. > >Steve > >-----Original Message----- >From: Andrew Elder [mailto:] >Sent: Wednesday, February 27, 2002 10:06 AM >To: >Subject: RE: [c6x] McBSPs on 100MHz > >All, > >The C6711 has a silicon design bug that can cause EDMA transfers to be missed. >The problem occurs when the cache controller takes over the EDMA controller (it >always has priority) thereby preventing EDMA <-> McBSP transfers. If code >generates an L1P miss followed by several L2 cache misses the cache controller >can take over the EDMA subsystem. An example of the sort of operation that can >cause this is memcpy(). > >Our company spent about 6 months tracking this one down. I'd hate someone else >to have to repeat the experience. > >Andrew E. > >At 01:29 PM 2/27/02 +0000, Martin.J Thompson wrote: >>>Martin, >>> >>>Did you encountered problems on that? >>> >> >>Not so far. >> >>>On the C6711 you can use the EDMA, isn't it? On the C6203 it is still the >>>DMA... >>> >>>Do you have any idea about the CPU-load you had? >>> >> >>Not too heavily loaded, probably around 50%. >> >>>I'm asking this 'cause I'm not sure if the C6203 can handle 2 full-speed >>>McBSP@100MHz connected to DMA... >>> >> >>That would depend on things like frame-size, whether it's going to external >>memory and so forth I imagine. >> >>Cheers, >>Martin >> >>> >>>-----Original Message----- >>>From: Martin.J Thompson [mailto:] >>>Sent: woensdag 27 februari 2002 9:29 >>>To: ; >>>Subject: Re: [c6x] McBSPs on 100MHz >>> >>> >>>I've done 75Mhz on a C6711 @150MHz core clock. >>> >>>Cheers, >>>Martin >>> >>>-- >>>Martin Thompson BEng(Hons) CEng MIEE >>>TRW Conekt >>>Stratford Road, Solihull, B90 4GW. UK >>>Tel: +44 (0)121-627-3569 - >>> >>> >>>>>> Asselman Jan <> 26 February 2002 16:50:01 >>>>>> >>>Hi, >>> >>>I'm wondering, has anyone experience using the McBSP on speeds as high as >>>75,100 or 150MHz. I'm using the C6203@300MHz. I try to figure out what the >>>maximum speed is on the McBSP if it uses the internal clock source. >>> >>>In the TI peripheral guide, it is stated that "The maximum bit rate for the >>>C6203B/03C device is 100 Mbps or CPU/2 (the slower of the two). " >>> >>>But I'm not sure I can use more than 75MHz... >>> >>>Any ideas? >>> >>>Jan >>> >> >_____________________________________ >Note: If you do a simple "reply" with your email client, only the author of >this message will receive your answer. You need to do a "reply all" if you >want your answer to be distributed to the entire group. > >_____________________________________ >About this discussion group: > >To Join: Send an email to > >To Post: Send an email to > >To Leave: Send an email to > >Archives: http://www.yahoogroups.com/group/c6x > >Other Groups: http://www.dsprelated.com >">http://docs.yahoo.com/info/terms/ > > >_____________________________________ >Note: If you do a simple "reply" with your email client, only the author of >this message will receive your answer. You need to do a "reply all" if you >want your answer to be distributed to the entire group. > >_____________________________________ >About this discussion group: > >To Join: Send an email to > >To Post: Send an email to > >To Leave: Send an email to > >Archives: http://www.yahoogroups.com/group/c6x > >Other Groups: http://www.dsprelated.com >">http://docs.yahoo.com/info/terms/

Andrew, is this silicon bug documented in any 6711 Silicon Errata? Thanks, Gabor > The C6711 has a silicon design bug that can cause EDMA > transfers to be missed. > The problem occurs when the cache controller takes over the > EDMA controller (it > always has priority) thereby preventing EDMA <-> McBSP > transfers. If code > generates an L1P miss followed by several L2 cache misses the > cache controller > can take over the EDMA subsystem. An example of the sort of > operation that can > cause this is memcpy(). > > Our company spent about 6 months tracking this one down. I'd > hate someone else > to have to repeat the experience. > > Andrew E.

Does TI have any technical documentation on this silicon bug? I'm working on a project that could be adversely affected by this. Steve -----Original Message----- From: Andrew Elder [mailto:] Sent: Wednesday, February 27, 2002 10:06 AM To: Subject: RE: [c6x] McBSPs on 100MHz All, The C6711 has a silicon design bug that can cause EDMA transfers to be missed. The problem occurs when the cache controller takes over the EDMA controller (it always has priority) thereby preventing EDMA <-> McBSP transfers. If code generates an L1P miss followed by several L2 cache misses the cache controller can take over the EDMA subsystem. An example of the sort of operation that can cause this is memcpy(). Our company spent about 6 months tracking this one down. I'd hate someone else to have to repeat the experience. Andrew E. At 01:29 PM 2/27/02 +0000, Martin.J Thompson wrote: >>Martin, >> >>Did you encountered problems on that? >> > >Not so far. > >>On the C6711 you can use the EDMA, isn't it? On the C6203 it is still the >>DMA... >> >>Do you have any idea about the CPU-load you had? >> > >Not too heavily loaded, probably around 50%. > >>I'm asking this 'cause I'm not sure if the C6203 can handle 2 full-speed >>McBSP@100MHz connected to DMA... >> > >That would depend on things like frame-size, whether it's going to external >memory and so forth I imagine. > >Cheers, >Martin > >> >>-----Original Message----- >>From: Martin.J Thompson [mailto:] >>Sent: woensdag 27 februari 2002 9:29 >>To: ; >>Subject: Re: [c6x] McBSPs on 100MHz >> >> >>I've done 75Mhz on a C6711 @150MHz core clock. >> >>Cheers, >>Martin >> >>-- >>Martin Thompson BEng(Hons) CEng MIEE >>TRW Conekt >>Stratford Road, Solihull, B90 4GW. UK >>Tel: +44 (0)121-627-3569 - >> >> >>>>> Asselman Jan <> 26 February 2002 16:50:01 >>>>> >>Hi, >> >>I'm wondering, has anyone experience using the McBSP on speeds as high as >>75,100 or 150MHz. I'm using the C6203@300MHz. I try to figure out what the >>maximum speed is on the McBSP if it uses the internal clock source. >> >>In the TI peripheral guide, it is stated that "The maximum bit rate for the >>C6203B/03C device is 100 Mbps or CPU/2 (the slower of the two). " >> >>But I'm not sure I can use more than 75MHz... >> >>Any ideas? >> >>Jan >> >> _____________________________________ Note: If you do a simple "reply" with your email client, only the author of this message will receive your answer. You need to do a "reply all" if you want your answer to be distributed to the entire group. _____________________________________ About this discussion group: To Join: Send an email to To Post: Send an email to To Leave: Send an email to Archives: http://www.yahoogroups.com/group/c6x Other Groups: http://www.dsprelated.com ">http://docs.yahoo.com/info/terms/

All, The C6711 has a silicon design bug that can cause EDMA transfers to be missed. The problem occurs when the cache controller takes over the EDMA controller (it always has priority) thereby preventing EDMA <-> McBSP transfers. If code generates an L1P miss followed by several L2 cache misses the cache controller can take over the EDMA subsystem. An example of the sort of operation that can cause this is memcpy(). Our company spent about 6 months tracking this one down. I'd hate someone else to have to repeat the experience. Andrew E. At 01:29 PM 2/27/02 +0000, Martin.J Thompson wrote: >>Martin, >> >>Did you encountered problems on that? >> > >Not so far. > >>On the C6711 you can use the EDMA, isn't it? On the C6203 it is still the >>DMA... >> >>Do you have any idea about the CPU-load you had? >> > >Not too heavily loaded, probably around 50%. > >>I'm asking this 'cause I'm not sure if the C6203 can handle 2 full-speed >>McBSP@100MHz connected to DMA... >> > >That would depend on things like frame-size, whether it's going to external >memory and so forth I imagine. > >Cheers, >Martin > >> >>-----Original Message----- >>From: Martin.J Thompson [mailto:] >>Sent: woensdag 27 februari 2002 9:29 >>To: ; >>Subject: Re: [c6x] McBSPs on 100MHz >> >> >>I've done 75Mhz on a C6711 @150MHz core clock. >> >>Cheers, >>Martin >> >>-- >>Martin Thompson BEng(Hons) CEng MIEE >>TRW Conekt >>Stratford Road, Solihull, B90 4GW. UK >>Tel: +44 (0)121-627-3569 - >> >> >>>>> Asselman Jan <> 26 February 2002 16:50:01 >>>>> >>Hi, >> >>I'm wondering, has anyone experience using the McBSP on speeds as high as >>75,100 or 150MHz. I'm using the C6203@300MHz. I try to figure out what the >>maximum speed is on the McBSP if it uses the internal clock source. >> >>In the TI peripheral guide, it is stated that "The maximum bit rate for the >>C6203B/03C device is 100 Mbps or CPU/2 (the slower of the two). " >> >>But I'm not sure I can use more than 75MHz... >> >>Any ideas? >> >>Jan >> >>

>Martin, > >Did you encountered problems on that? > Not so far. >On the C6711 you can use the EDMA, isn't it? On the C6203 it is still the >DMA... > >Do you have any idea about the CPU-load you had? > Not too heavily loaded, probably around 50%. >I'm asking this 'cause I'm not sure if the C6203 can handle 2 full-speed >McBSP@100MHz connected to DMA... > That would depend on things like frame-size, whether it's going to external memory and so forth I imagine. Cheers, Martin > >-----Original Message----- >From: Martin.J Thompson [mailto:] >Sent: woensdag 27 februari 2002 9:29 >To: ; >Subject: Re: [c6x] McBSPs on 100MHz >I've done 75Mhz on a C6711 @150MHz core clock. > >Cheers, >Martin > >-- >Martin Thompson BEng(Hons) CEng MIEE >TRW Conekt >Stratford Road, Solihull, B90 4GW. UK >Tel: +44 (0)121-627-3569 - >>>> Asselman Jan <> 26 February 2002 16:50:01 >>>> >Hi, > >I'm wondering, has anyone experience using the McBSP on speeds as high as >75,100 or 150MHz. I'm using the C6203@300MHz. I try to figure out what the >maximum speed is on the McBSP if it uses the internal clock source. > >In the TI peripheral guide, it is stated that "The maximum bit rate for the >C6203B/03C device is 100 Mbps or CPU/2 (the slower of the two). " > >But I'm not sure I can use more than 75MHz... > >Any ideas? > >Jan >_____________________________________ >Note: If you do a simple "reply" with your email client, only the author of >this message will receive your answer. You need to do a "reply all" if you >want your answer to be distributed to the entire group. > >_____________________________________ >About this discussion group: > >To Join: Send an email to > >To Post: Send an email to > >To Leave: Send an email to > >Archives: http://www.yahoogroups.com/group/c6x > >Other Groups: http://www.dsprelated.com >">http://docs.yahoo.com/info/terms/ > > >_____________________________________ >Note: If you do a simple "reply" with your email client, only the author of >this message will receive your answer. You need to do a "reply all" if you >want your answer to be distributed to the entire group. > >_____________________________________ >About this discussion group: > >To Join: Send an email to > >To Post: Send an email to > >To Leave: Send an email to > >Archives: http://www.yahoogroups.com/group/c6x > >Other Groups: http://www.dsprelated.com >">http://docs.yahoo.com/info/terms/ >