Bob,

Bob Jones schrieb:
> Thanks for the reply.
> Is this code from a bootloader? 

Almost. My bootloader doesn't mess with PLL, so I can use it in 
enviroments with different clocksources.

This is the function that is called first after the bootloader.

 > I thought bootloaders had to be written
> in assembler since the
> C environment had not been setup yet. 

You need a call to _c_int00 before. But you don't need CSL_init()!

 > You do show where the delays are
> needed, that's a
> help Thanks,
> 
> Bob
> 
> Bernhard Gustl Bauer wrote:
> 
>> Hello Bob,
>>
>> below is the code I use.
>>
>> HTH Gustl
>>
>>
>>         // Reset PLL
>> PLL_RSET(PLLCSR,PLL_PLLCSR_RMK(    PLL_PLLCSR_PLLRST_1,
>>                 PLL_PLLCSR_PLLPWRDN_NO,
>>                 PLL_PLLCSR_PLLEN_BYPASS));
>> PLL_RSET(PLLDIV0,PLL_PLLDIV0_RMK(    PLL_PLLDIV0_D0EN_ENABLE,
>>                     PLL_PLLDIV0_RATIO_OF(0)));
>> PLL_RSET(PLLM,PLL_PLLM_RMK(PLL_PLLM_PLLM_OF(SYSCLK1_FREQ/CLKI_FREQ)));
>>         // wait 125 ns; DSP runs with 25MHz/40ns or 20MHz/50ns
>> for (waittime=0; waittime<4; waittime++);
>>
>>         // bring PLL out of reset
>> PLL_RSET(PLLCSR,PLL_PLLCSR_RMK(    PLL_PLLCSR_PLLRST_0,
>>                 PLL_PLLCSR_PLLPWRDN_NO,
>>                 PLL_PLLCSR_PLLEN_BYPASS));
>>  // wait 187,5 us till PLL locks; DSP runs with 25MHz/40ns or
20MHz/50ns
>> for (waittime=0; waittime<4688; waittime++);
>>         // enable PLL
>> PLL_RSET(PLLCSR,PLL_PLLCSR_RMK(    PLL_PLLCSR_PLLRST_0,
>>                 PLL_PLLCSR_PLLPWRDN_NO,
>>                 PLL_PLLCSR_PLLEN_ENABLE));
>>
>> Bob Jones schrieb:
>>
>>> Hello,
>>>
>>> Following the example in SPRA999A we've written a bootloader
for our 
>>> custom C6713B based
>>> card. Now we would like to add PLL configuration. Does anyone have
an 
>>> example bootloader
>>> which includes the PLL setup? More specifically how and where do
you 
>>> put in the requisite delays?
>>>
>>> Thanks,
>>> Bob
>>>
>>
>>
>
	

Hello Bob,

below is the code I use.

HTH Gustl
			// Reset PLL
PLL_RSET(PLLCSR,PLL_PLLCSR_RMK(	PLL_PLLCSR_PLLRST_1,
				PLL_PLLCSR_PLLPWRDN_NO,
				PLL_PLLCSR_PLLEN_BYPASS));
PLL_RSET(PLLDIV0,PLL_PLLDIV0_RMK(	PLL_PLLDIV0_D0EN_ENABLE,
					PLL_PLLDIV0_RATIO_OF(0)));
PLL_RSET(PLLM,PLL_PLLM_RMK(PLL_PLLM_PLLM_OF(SYSCLK1_FREQ/CLKI_FREQ)));
		// wait 125 ns; DSP runs with 25MHz/40ns or 20MHz/50ns
for (waittime=0; waittime<4; waittime++);

		// bring PLL out of reset
PLL_RSET(PLLCSR,PLL_PLLCSR_RMK(	PLL_PLLCSR_PLLRST_0,
				PLL_PLLCSR_PLLPWRDN_NO,
				PLL_PLLCSR_PLLEN_BYPASS));
  // wait 187,5 us till PLL locks; DSP runs with 25MHz/40ns or 20MHz/50ns
for (waittime=0; waittime<4688; waittime++);
		// enable PLL
PLL_RSET(PLLCSR,PLL_PLLCSR_RMK(	PLL_PLLCSR_PLLRST_0,
				PLL_PLLCSR_PLLPWRDN_NO,
				PLL_PLLCSR_PLLEN_ENABLE));

Bob Jones schrieb:
> Hello,
> 
> Following the example in SPRA999A we've written a bootloader for our 
> custom C6713B based
> card. Now we would like to add PLL configuration. Does anyone have an 
> example bootloader
> which includes the PLL setup? More specifically how and where do you put 
> in the requisite delays?
> 
> Thanks,
> Bob
>
	

Hello,

Following the example in SPRA999A we've written a bootloader for our 
custom C6713B based
card. Now we would like to add PLL configuration. Does anyone have an 
example bootloader
which includes the PLL setup? More specifically how and where do you put 
in the requisite delays?

Thanks,
Bob