Reply by pol_...@mail.ru●September 29, 20112011-09-29
Hi, Mike!
Thanks for your answer. I have given not sufficient information about my
project. Excuse me, I am “newcomer”.
Yes, base signal is there with some randomness on top of it. Look plot output
signal in attached file for case FsOUT = FsIN. Amplitude of the noise is 1
– 10 bit. Output signal is triangle wave, but the data consisting it is
“jumping” regarding “right” data.
1. Calculation for SCLK Serial Port:
SCLK = PCLK/4(CLKDIV +1) = 3,31 MHz.(page 7-9 of ADSP-2137x SHARC® Processor
Hardware Reference)
SCLK is satisfactory for SCLK
2. Calculation for Sample Rate Serial Port:
Sample rate = SCLK/ FSDIV = 138 kHz. It is satisfactory for Sample rate < 192
kHz (page 9-2 of ADSP-2137x SHARC® Processor Hardware Reference).
Formulas and conditions are equal for ADSP-21369 and ADSP-21364.
Reply by Mike Rosing●September 28, 20112011-09-28
Your English is way better than my Russian!!
On Wed, 28 Sep 2011, polcoolov wrote:
> Problems with project in technical note EE-268
(Programming
> Asynchronous Sample Rate Converters on ADSP-2136x) on ADSP-21369.
>
> I started project “SRC SPORT0 to SPORT1” on ADSP-21369
> (dspblok™ 21369zx). I have changed code for porting on ADSP21369
> only by including files. But I have got output values in the negative
> and added ‘DTYPE1 bit’ in Sport1Init (). There are noises
> in output signal.
When you say "noise" do you mean there no recognizable signal at all? Or
is the base signal there with some randomness on top of it? If the
former, then check the pDIVx values, maybe there is a difference in how
the devices work.
Also, what is the amplitude of the noise compared to the signal? How is
the hardware different between the two projects? There are a lot of
possible places for things to go wrong, it might not just be code.
Patience, persistence, truth,
Dr. mike
Reply by polcoolov●September 28, 20112011-09-28
Problems with project in technical note EE-268 (Programming
Asynchronous Sample Rate Converters on ADSP-2136x) on ADSP-21369.
I started project “SRC SPORT0 to SPORT1” on ADSP-21369
(dspblok™ 21369zx). I have changed code for porting on ADSP21369
only by including files. But I have got output values in the negative
and added ‘DTYPE1 bit’ in Sport1Init (). There are noises
in output signal.
I have no idea about it. Where is the mistake? Code listing below: