On Thu, 13 May 2004 20:58:19 -0700, Tim Wescott
<tim@wescottnospamdesign.com> wrote:
> geoffrey wall wrote:
>> Im a grad student in EE and i am working on a research project for 
>> computer vision/face detection. The image filtering and hist 
>> equalization is preprocessing before being sent to a support vector 
>> machine. We would like to implement these algorithms in real time, and 
>> thereby do video face recognition.
>> 
> For a one-off you may be best served by getting a screamingly fast PC 
> and learning how to program it in MMX mode.  This will be way more 
> expensive per unit than an FPGA solution, use way more power and way 
> more space -- but it'll be easier to make changes.
>
> Since you'll be making lots and lots of changes, and probably never 
> fielding systems, you probably don't want the FPGA route.
>

I'll add the obligatory "Ask you advisor"  as an EE student, they may
"suggest" a hardware solution as a better course--In other words, the
people who will be reviewing it respect hardware more than software.
Or respect "an embedded solution" to "a PC" even if the PC and the
embedded board use the same CPU.  Always an issue with student work.

But for proving things out and developing algorithms, a software
solution, regardless of the CPU, is going to be simpler for the reasons
Tim mentioned. 

Charles

geoffrey wall wrote:
> Im a grad student in EE and i am working on a research project for 
> computer vision/face detection. The image filtering and hist 
> equalization is preprocessing before being sent to a support vector 
> machine. We would like to implement these algorithms in real time, and 
> thereby do video face recognition.
> 
> Tachyon wrote:
> 
>> On 2004-05-11, Kevin Neilson <kevin_neilson@removethiscomcast.net> wrote:
>>
>>> "geoffrey wall" <wallge@eng.fsu.edu> wrote in message
>>> news:c7re36$cpf$1@news.fsu.edu...
>>>
>>>> I am trying to determine the best solution for real time image/video
>>>> processing in hardware... Does anyone have any thoughts as to which
>>>> solution (FPGA or DSP uP) is better. I would like to run several
>>>> (roughly 10) convolution filters as well as perform image histogram
>>>> equalization operations on each frame of a gray 640x480 frame at a rate
>>>> of about 15 fps. Any comments would be most appreciated...
>>>> thanks
>>>>
>>>> GW
>>>
>>>
>>> You need to make a rough estimate of the MIPS required.  If the 
>>> result is
>>> small enough so that you can do it in a DSP, then do it there.  
>>> Otherwise
>>> you'll need an FPGA.  The length of the filters is necessary for this
>>> calculation.
>>
>>
>>
>> If you can do it in a DSP, do it there.  if you can'd do it in a DSP
>> do it in 2 DSP's.  If you can't do it in N DSP's, you'll need an FPGA :)
>>
>> Actually, the number of pixels * frame rate * # filters turns out to
>> be 46 MIPS....that's 46 MIPS per tap in the convolution filter....
>> If they're within 10-50 taps, a pentium/amd/PPC w/ SMD may be able
>> to handle this even more conveniently, minus some cycles for the 
>> histogram.
>>
>> What are you doing this for, btw?
>>
> 

For a one-off you may be best served by getting a screamingly fast PC 
and learning how to program it in MMX mode.  This will be way more 
expensive per unit than an FPGA solution, use way more power and way 
more space -- but it'll be easier to make changes.

Since you'll be making lots and lots of changes, and probably never 
fielding systems, you probably don't want the FPGA route.

-- 

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

Im a grad student in EE and i am working on a research project for 
computer vision/face detection. The image filtering and hist 
equalization is preprocessing before being sent to a support vector 
machine. We would like to implement these algorithms in real time, and 
thereby do video face recognition.

Tachyon wrote:
> On 2004-05-11, Kevin Neilson <kevin_neilson@removethiscomcast.net> wrote:
> 
>>"geoffrey wall" <wallge@eng.fsu.edu> wrote in message
>>news:c7re36$cpf$1@news.fsu.edu...
>>
>>>I am trying to determine the best solution for real time image/video
>>>processing in hardware... Does anyone have any thoughts as to which
>>>solution (FPGA or DSP uP) is better. I would like to run several
>>>(roughly 10) convolution filters as well as perform image histogram
>>>equalization operations on each frame of a gray 640x480 frame at a rate
>>>of about 15 fps. Any comments would be most appreciated...
>>>thanks
>>>
>>>GW
>>
>>You need to make a rough estimate of the MIPS required.  If the result is
>>small enough so that you can do it in a DSP, then do it there.  Otherwise
>>you'll need an FPGA.  The length of the filters is necessary for this
>>calculation.
> 
> 
> If you can do it in a DSP, do it there.  if you can'd do it in a DSP
> do it in 2 DSP's.  If you can't do it in N DSP's, you'll need an FPGA :)
> 
> Actually, the number of pixels * frame rate * # filters turns out to
> be 46 MIPS....that's 46 MIPS per tap in the convolution filter....
> If they're within 10-50 taps, a pentium/amd/PPC w/ SMD may be able
> to handle this even more conveniently, minus some cycles for the histogram.
> 
> What are you doing this for, btw?
>

FWIW, depending on the size of your convolution kernels (the bigger the kernel, the
longer the required line buffer), and your design skills, it can  do this in one of
the cheap FPGAs plus an SDRAM if you need any frame buffering.  I think you'll find
that it is well beyond the capability of low and even medium cost DSP micros.  I've
done histogram equalization plus filtering using a Spartan2 for NTSC color video
(it is in a real-time video enhancement product).  The cost of the FPGA is far less
than the cost of a DSP micro that can keep up with the processing.  Newer
generation FPGAs make it even easier because they generally have more and faster
resources for the same price.

Tachyon wrote:

> On 2004-05-11, Kevin Neilson <kevin_neilson@removethiscomcast.net> wrote:
> >
> > "geoffrey wall" <wallge@eng.fsu.edu> wrote in message
> > news:c7re36$cpf$1@news.fsu.edu...
> >> I am trying to determine the best solution for real time image/video
> >> processing in hardware... Does anyone have any thoughts as to which
> >> solution (FPGA or DSP uP) is better. I would like to run several
> >> (roughly 10) convolution filters as well as perform image histogram
> >> equalization operations on each frame of a gray 640x480 frame at a rate
> >> of about 15 fps. Any comments would be most appreciated...
> >> thanks
> >>
> >> GW
> >
> > You need to make a rough estimate of the MIPS required.  If the result is
> > small enough so that you can do it in a DSP, then do it there.  Otherwise
> > you'll need an FPGA.  The length of the filters is necessary for this
> > calculation.
>
> If you can do it in a DSP, do it there.  if you can'd do it in a DSP
> do it in 2 DSP's.  If you can't do it in N DSP's, you'll need an FPGA :)
>
> Actually, the number of pixels * frame rate * # filters turns out to
> be 46 MIPS....that's 46 MIPS per tap in the convolution filter....
> If they're within 10-50 taps, a pentium/amd/PPC w/ SMD may be able
> to handle this even more conveniently, minus some cycles for the histogram.
>
> What are you doing this for, btw?
>
> --
>         different MP3 every day!     http://gweep.net/~shifty/snackmaster
>      .        .       .      .     .    .   .  . ... .  .   .    .     .      .
> "Maybe if you ever picked up a goddamn keyboard   |     Niente
>  and compiler, you'd know yourself." -Matthew 7:1 | shifty@gweep.net

--
--Ray Andraka, P.E.
President, the Andraka Consulting Group, Inc.
401/884-7930     Fax 401/884-7950
email ray@andraka.com
http://www.andraka.com

 "They that give up essential liberty to obtain a little
  temporary safety deserve neither liberty nor safety."
                                          -Benjamin Franklin, 1759

On 2004-05-11, Kevin Neilson <kevin_neilson@removethiscomcast.net> wrote:
>
> "geoffrey wall" <wallge@eng.fsu.edu> wrote in message
> news:c7re36$cpf$1@news.fsu.edu...
>> I am trying to determine the best solution for real time image/video
>> processing in hardware... Does anyone have any thoughts as to which
>> solution (FPGA or DSP uP) is better. I would like to run several
>> (roughly 10) convolution filters as well as perform image histogram
>> equalization operations on each frame of a gray 640x480 frame at a rate
>> of about 15 fps. Any comments would be most appreciated...
>> thanks
>>
>> GW
>
> You need to make a rough estimate of the MIPS required.  If the result is
> small enough so that you can do it in a DSP, then do it there.  Otherwise
> you'll need an FPGA.  The length of the filters is necessary for this
> calculation.

If you can do it in a DSP, do it there.  if you can'd do it in a DSP
do it in 2 DSP's.  If you can't do it in N DSP's, you'll need an FPGA :)

Actually, the number of pixels * frame rate * # filters turns out to
be 46 MIPS....that's 46 MIPS per tap in the convolution filter....
If they're within 10-50 taps, a pentium/amd/PPC w/ SMD may be able
to handle this even more conveniently, minus some cycles for the histogram.

What are you doing this for, btw?

-- 
        different MP3 every day!     http://gweep.net/~shifty/snackmaster
     .        .       .      .     .    .   .  . ... .  .   .    .     .      .
"Maybe if you ever picked up a goddamn keyboard   |     Niente 
 and compiler, you'd know yourself." -Matthew 7:1 | shifty@gweep.net

Kevin Neilson wrote:
> "geoffrey wall" <wallge@eng.fsu.edu> wrote in message
> news:c7re36$cpf$1@news.fsu.edu...
> 
>>I am trying to determine the best solution for real time image/video
>>processing in hardware... Does anyone have any thoughts as to which
>>solution (FPGA or DSP uP) is better. I would like to run several
>>(roughly 10) convolution filters as well as perform image histogram
>>equalization operations on each frame of a gray 640x480 frame at a rate
>>of about 15 fps. Any comments would be most appreciated...
>>thanks
>>
>>GW
> 
> 
> You need to make a rough estimate of the MIPS required.  If the result is
> small enough so that you can do it in a DSP, then do it there.  Otherwise
> you'll need an FPGA.  The length of the filters is necessary for this
> calculation.
> 
> 

You should also consider the memory bandwidth available -- real-time 
video applications often seem to be more limited by the speed that you 
can get the data into and out of the chips than by what actually goes on 
inside the chips, and it's easier to stick more or wider ports onto an 
FPGA than a DSP!

-- 

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

"geoffrey wall" <wallge@eng.fsu.edu> wrote in message
news:c7re36$cpf$1@news.fsu.edu...
> I am trying to determine the best solution for real time image/video
> processing in hardware... Does anyone have any thoughts as to which
> solution (FPGA or DSP uP) is better. I would like to run several
> (roughly 10) convolution filters as well as perform image histogram
> equalization operations on each frame of a gray 640x480 frame at a rate
> of about 15 fps. Any comments would be most appreciated...
> thanks
>
> GW

You need to make a rough estimate of the MIPS required.  If the result is
small enough so that you can do it in a DSP, then do it there.  Otherwise
you'll need an FPGA.  The length of the filters is necessary for this
calculation.