On Jan 29, 9:24 am, fpgaasicdesig...@gmail.com wrote:
> Hi all,
>
> I'm looking for an architecture dedicated to a Gbps BPSK demodulation.
> I will have I and Q available on a 4 bits ADC @ 3Gbps..
>
> Do you know what is the best archtiecture in regards to this high data
> rate ?
>
> I though about CORDIC perhaps, but I'm not sure it can handle this
> data rate...
>
> What suggestions do you have to start my research ?
>
> Thanks

What are your hardware limitations?

Hi all,

I'm looking for an architecture dedicated to a Gbps BPSK demodulation.
I will have I and Q available on a 4 bits ADC @ 3Gbps..

Do you know what is the best archtiecture in regards to this high data
rate ?

I though about CORDIC perhaps, but I'm not sure it can handle this
data rate...

What suggestions do you have to start my research ?

Thanks