High speed data collection with Blackfin DSP
This report covers a master thesis in embedded systems, the goal of which was to investigate the high speed data collection capabilities with a Blackfin DSP. Basic theory about sampling and noise is covered briefly from a practical point of view. The theory is intended to be useful for those diving into a ADC datasheet for the first time. After an investigation of the delimiting factors, suitable components were selected and a prototype ADC PCB was designed from scratch. The goal is to design a general low noise data collecting unit compatible with the Blackfin DSP. Finally simple DSP software is designed to prove that DSP can handle such a high datastream.Testing the ADC card with the target Blackfin platform indicates thatthe analog parts indeed works. An analog bandwidth of over 10MHz ismeasured at a resolution exceeding 10 bits with respect to noise. The digital parts intended to interleave the two channels digital streams into one Blackfin unit did not work as intended. Only one channel is supported as of now. The report contains suggestions for future work in this area.
Summary
This master's thesis investigates building a high-speed data acquisition system around an Analog Devices Blackfin DSP. It presents practical sampling and noise theory, ADC and analog front-end selection, prototype PCB design, and verifies real-time DSP software handling high-rate data streams and an analog bandwidth above 10 MHz.
Key Takeaways
- Identify the primary limiting factors when interfacing high-speed ADCs to a Blackfin-class DSP (noise, jitter, bandwidth, and data throughput).
- Select ADCs and low-noise analog front-end components appropriate for >10 MHz analog bandwidth applications.
- Design PCB layout and grounding practices to minimize coupling and preserve signal integrity for high-speed data capture.
- Implement and validate DMA-driven, real-time data streaming on Blackfin hardware to sustain high datarates.
- Apply practical sampling and noise analysis techniques to interpret ADC datasheets and establish system-level SNR budgets.
Who Should Read This
An embedded/DSP engineer with intermediate experience in ADC front-end and firmware design who needs practical guidance to build or evaluate high-speed data acquisition systems and validate real-time processing on Blackfin-class processors.
Still RelevantIntermediate
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