Hello,
We have some problem related
to SPORT operation in ADSP2189 processor. The
problem is detailed below. Can you help us in
solving our problem?
Thanking you in advance,
Regards,
Nagaraj CS
Processor : ADSP -
2189M
Our problem:
We want both SPORT0 TX and SPORT0 RX interrupts.
Also we are receiving data
through SPORT0 RX. We are not using SPORT0 TX
for transmission purposes.
That means we want to get both TX and RX
interrupts by using only RX operation.
What we have done:
The external clock to SPORT0 is 2.048 MHz.
The index register settings are like this.
TIREG - i2 TMREG - m1(which is always
zero)
RIREG - i2 RMREG - m2(which is always
one)
i2 will be pointing to a circular buffer
of length 128.
Autobuffering is enabled for both TX and RX. IMASK
for both interrupts are enabled.
With some experiments we arrived at a conclusion
- if autobuffering is enabled and the
modify register is zero (as in the case of our
RX), we get only TX interrupt when
autobuffering is complete (1 milli sec in our
case) and no RX interrupt.
We force the Rx interrupt from ifc and use it
for another process. So we have got both
RX and TX interrupts along with the data received
in RX buffer.
SPORT0 register settings are like this
SPORT0 AUTOBUFFER CONTROL REGISTER (0x3FF3)
- 0x04AB
xx - 0
clkodis - 0
xx - 0
biasrnd - 0
tireg - 010
tmreg - 01
rireg - 010
rmreg - 10
tbuf - 1
rbuf - 1
SPORT0 RFSDIV REGISTER (0x3FF4) - 0x0000
SPORT0 SCLKDIV REGISTER (0x3FF5) -
0x0000
SPORT0 CONTROL REGISTER (0x3FF6) -
0x030F
mce - 0
isclk - 0
rfsr - 0
rfsw - 0
tfsr - 0
tfsw - 0
itfs - 1
irfs - 1
invtfs - 0
invrfs - 0
dtype - 00
slen - 1111
What is happening:
After some hours of continuous operation,
the index register
stops and fails to increment and hence interrupts
are not generated.
The Question:
1. Is there any flaw in SPORT usage OR design
? If yes, how
can we correct it?
2. Are there any other solutions to our problem
?
--
/*********************************************************************/
/* x.v >= h/m -------------->
path to TOE */
/*********************************************************************/
|