Hello all Has anybody ever experienced power-up problems with the 21065L Sharc? It is kind of a problem where the chip does not seem to "start" properly. The reset line does not help. It has to do with the 3.3V power - either the ramping of the 3.3V voltage or maybe sequencing of the 5V and 3.3V supplies we use in our system. I found that when I delay the 3.3V ramp-up relative to the 5V then the problem is less severe. Is it true that there are bias voltage generators inside the Sharc (substrate voltage?) which might not start properly? Thanks for your help Daniel Weiss WEISS ENGINEERING LTD. - Professional Digital Audio Products Florastrasse 42 8610 Uster Switzerland phone: +41 1 940 20 06, fax: +41 1 940 22 14 email: web: http://www.weiss.ch Subscribe to our maillist at http://groups.yahoo.com/group/weiss-audio |
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21065L power problem
Started by ●March 5, 2001
Reply by ●March 5, 20012001-03-05
Daniel- >Has anybody ever experienced power-up problems with the 21065L Sharc? It >is kind of a problem where the chip does not seem to "start" properly. >The reset line does not help. It has to do with the 3.3V power - either >the ramping of the 3.3V voltage or maybe sequencing of the 5V and 3.3V >supplies we use in our system. I found that when I delay the 3.3V >ramp-up relative to the 5V then the problem is less severe. Is it true >that there are bias voltage generators inside the Sharc (substrate >voltage?) which might not start properly? Also check for multiple mode/config lines tied to the same pull-up or pull-down resistors. I've seen a case before where one or more such lines tied together were temporarily outputs during reset, influencing the other signals and causing the processor to go into the wrong state. The solution was to separate the signals and use more pull-up / pull-down Rs. Jeff Brower DSP sw/hw engineer Signalogic |
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Reply by ●March 6, 20012001-03-06
Thanks, Jeff, for the hints. I am not quite sure what lines need a defined state during power-up (except for the obvious ones). Do you know for the 21065L? Daniel > -----Original Message----- > From: Jeff Brower [mailto:] > Sent: Monday, March 05, 2001 3:13 PM > To: Daniel Weiss > Cc: > Subject: Re: [adsp] 21065L power problem > Daniel- > > >Has anybody ever experienced power-up problems with the > 21065L Sharc? It > >is kind of a problem where the chip does not seem to "start" > properly. > >The reset line does not help. It has to do with the 3.3V > power - either > >the ramping of the 3.3V voltage or maybe sequencing of the > 5V and 3.3V > >supplies we use in our system. I found that when I delay the 3.3V > >ramp-up relative to the 5V then the problem is less severe. > Is it true > >that there are bias voltage generators inside the Sharc (substrate > >voltage?) which might not start properly? > > Also check for multiple mode/config lines tied to the same > pull-up or pull-down > resistors. I've seen a case before where one or more such > lines tied together > were temporarily outputs during reset, influencing the other > signals and causing > the processor to go into the wrong state. The solution was > to separate the > signals and use more pull-up / pull-down Rs. > > Jeff Brower > DSP sw/hw engineer > Signalogic > _____________________________________ > Note: If you do a simple "reply" with your email client, only > the author of this message will receive your answer. You > need to do a "reply all" if you want your answer to be > distributed to the entire group. > > _____________________________________ > About this discussion group: > > To Join: Send an email to > > To Post: Send an email to > > To Leave: Send an email to > > Archives: http://www.egroups.com/group/adsp > > Other Groups: http://www.dsprelated.com > ">http://docs.yahoo.com/info/terms/ |
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Reply by ●March 6, 20012001-03-06
It might be a good idea for you to take a look at the ADSP-21065L
development kit schematics, available at ftp://ftp.analog.com/pub/dsp/210xx/21065l/schematics/ Regards, Clifford Daniel Weiss wrote: > Thanks, Jeff, for the hints. > > I am not quite sure what lines need a defined state during power-up (except > for the obvious ones). Do you know for the 21065L? > > Daniel > > > -----Original Message----- > > From: Jeff Brower [mailto:] > > Sent: Monday, March 05, 2001 3:13 PM > > To: Daniel Weiss > > Cc: > > Subject: Re: [adsp] 21065L power problem > > > > > > Daniel- > > > > >Has anybody ever experienced power-up problems with the > > 21065L Sharc? It > > >is kind of a problem where the chip does not seem to "start" > > properly. > > >The reset line does not help. It has to do with the 3.3V > > power - either > > >the ramping of the 3.3V voltage or maybe sequencing of the > > 5V and 3.3V > > >supplies we use in our system. I found that when I delay the 3.3V > > >ramp-up relative to the 5V then the problem is less severe. > > Is it true > > >that there are bias voltage generators inside the Sharc (substrate > > >voltage?) which might not start properly? > > > > Also check for multiple mode/config lines tied to the same > > pull-up or pull-down > > resistors. I've seen a case before where one or more such > > lines tied together > > were temporarily outputs during reset, influencing the other > > signals and causing > > the processor to go into the wrong state. The solution was > > to separate the > > signals and use more pull-up / pull-down Rs. > > > > Jeff Brower > > DSP sw/hw engineer > > Signalogic > > > > > > _____________________________________ > > Note: If you do a simple "reply" with your email client, only > > the author of this message will receive your answer. You > > need to do a "reply all" if you want your answer to be > > distributed to the entire group. > > > > _____________________________________ > > About this discussion group: > > > > To Join: Send an email to > > > > To Post: Send an email to > > > > To Leave: Send an email to > > > > Archives: http://www.egroups.com/group/adsp > > > > Other Groups: http://www.dsprelated.com > > > > > > ">http://docs.yahoo.com/info/terms/ > > _____________________________________ > Note: If you do a simple "reply" with your email client, only the author of this message will receive your answer. You need to do a "reply all" if you want your answer to be distributed to the entire group. > > _____________________________________ > About this discussion group: > > To Join: Send an email to > > To Post: Send an email to > > To Leave: Send an email to > > Archives: http://www.egroups.com/group/adsp > > Other Groups: http://www.dsprelated.com > ">http://docs.yahoo.com/info/terms/ |
Reply by ●March 6, 20012001-03-06
Daniel- >I am not quite sure what lines need a defined state during power-up (except >for the obvious ones). Do you know for the 21065L? Me neither. But look for ones that share pull-up and or pull-down resistors. If there are any, they might be suspect. Jeff Brower Signalogic >> -----Original Message----- >> From: Jeff Brower [mailto:] >> Sent: Monday, March 05, 2001 3:13 PM >> To: Daniel Weiss >> Cc: >> Subject: Re: [adsp] 21065L power problem >> >> >> Daniel- >> >> >Has anybody ever experienced power-up problems with the >> 21065L Sharc? It >> >is kind of a problem where the chip does not seem to "start" >> properly. >> >The reset line does not help. It has to do with the 3.3V >> power - either >> >the ramping of the 3.3V voltage or maybe sequencing of the >> 5V and 3.3V >> >supplies we use in our system. I found that when I delay the 3.3V >> >ramp-up relative to the 5V then the problem is less severe. >> Is it true >> >that there are bias voltage generators inside the Sharc (substrate >> >voltage?) which might not start properly? >> >> Also check for multiple mode/config lines tied to the same >> pull-up or pull-down >> resistors. I've seen a case before where one or more such >> lines tied together >> were temporarily outputs during reset, influencing the other >> signals and causing >> the processor to go into the wrong state. The solution was >> to separate the >> signals and use more pull-up / pull-down Rs. >> >> Jeff Brower >> DSP sw/hw engineer >> Signalogic |