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Regarding loop back in blackfin

Started by Sathish Kumar Sha February 16, 2006
hi every one,  i tried out the loop back test for UART, But it was not working.  Here is the code.
 
It was just a simulation in VDSP 3.5++ .  Will it work in simulation mode.  Please help.  Thanks in advance.
 
#include "defbf531.h"
.global _main;
.section L1_code;
_main:
I2.L=LO(UART_LSR);
I2.H=HI(UART_LSR);
//SET THE DLAB TO ACCESS THE DIVISOR PARAMETER
I0.L=LO(UART_LCR);
I0.H=HI(UART_LCR);
R0=0X83(z);
[ I0 ] = R0;
                                          
//SET THE LOWER DIVISOR(BAUD RATE200)
I3.L=LO(UART_DLL);
I3.H=HI(UART_DLL);
R0=0X4(z);
[ I3 ] = R0;
//SET THE UPPER DIVISOR
I3.L=LO(UART_DLH);
I3.H=HI(UART_DLH);
R1=0X1(z);
[ I3 ] = R1;
//LOOPING
I1.L=LO(UART_MCR);
I1.H=HI(UART_MCR);
R0=0X10(z);
[ I1 ]=R0;
//DISABLE THE DLAB TO ACCESS THE RBR AND THR
R0=0X3(z);
[ I0 ] = R0;
//ENABLE THE UART CLOCK
I3.L=LO(UART_GCTL);
I3.H=HI(UART_GCTL);
R0=0X01(z);
[ I3 ]=R0;
//WRITE TO TX
I1.L=LO(UART_THR);
I1.H=HI(UART_THR);
R0=0X01(z);
[ I1 ]=R0;
nop;
nop;
nop;
nop;
nop;
nop;
nop;
WAIT:
R0=[ I2 ];
CC=BITTST(R0,0);
IF !CC JUMP WAIT;
I2.L=LO(UART_RBR);
I2.H=HI(UART_RBR);
R1 = [ I2 ];
NOP;
NOP;

_main.end: