I want to connect 3 BF533s processors together using the SPORT in TDM. I wanted
to make sure my thoughts were correct regarding the connections. In order to
receive and transmit among the processors do i connect all the DT0PRI and DR0PRI
lines together? Also I assume the RSCLK0 and RFS0 are connected together as
well. The TSCLK0 is not used and the TFS0 is a transmit valid flag, which
doesn't need to be used either if not necessary. I was wondering how the
RFS0 works now since all the devices are connected together who drives the RFS,
does each processor take turns driving the RFS or does each SPORT know when its
channel is due to transmit?
Thanks,
Brad
BF533 SPORT TDM
Started by ●August 1, 2006
Reply by ●August 2, 20062006-08-02
Hi,
For the TFS and RFS signals, choose one chip as
master, the other two will be slave. The issue is that
SPORT is a point-to-point kind of connection/protocol,
so, you have to have one output connected to two
inputs, not more than one transmitter at a given time
at the same connection point, and you can not change
the direction of the pin fron Tx to Rx or viceversa
there is no multi-chip support in SPORT.
Your best bet it so use I2C, which actually was
designed for connection more than two chips at the
same time, its lines are open-dran (except maybe the
clock lines, which you should choose one chip as
master which drives the clock signal, ALL the others
as slaves receivind the clock signal).
JaaC
--- b...@yahoo.com wrote:
> I want to connect 3 BF533s processors together using
> the SPORT in TDM. I wanted to make sure my thoughts
> were correct regarding the connections. In order to
> receive and transmit among the processors do i
> connect all the DT0PRI and DR0PRI lines together?
> Also I assume the RSCLK0 and RFS0 are connected
> together as well. The TSCLK0 is not used and the
> TFS0 is a transmit valid flag, which doesn't need to
> be used either if not necessary. I was wondering
> how the RFS0 works now since all the devices are
> connected together who drives the RFS, does each
> processor take turns driving the RFS or does each
> SPORT know when its channel is due to transmit?
>
> Thanks,
> Brad
>
> a...
>
>
>
Jaime Andr Aranguren Cardona
j...@ieee.org
j...@computer.org
__________________________________________________
For the TFS and RFS signals, choose one chip as
master, the other two will be slave. The issue is that
SPORT is a point-to-point kind of connection/protocol,
so, you have to have one output connected to two
inputs, not more than one transmitter at a given time
at the same connection point, and you can not change
the direction of the pin fron Tx to Rx or viceversa
there is no multi-chip support in SPORT.
Your best bet it so use I2C, which actually was
designed for connection more than two chips at the
same time, its lines are open-dran (except maybe the
clock lines, which you should choose one chip as
master which drives the clock signal, ALL the others
as slaves receivind the clock signal).
JaaC
--- b...@yahoo.com wrote:
> I want to connect 3 BF533s processors together using
> the SPORT in TDM. I wanted to make sure my thoughts
> were correct regarding the connections. In order to
> receive and transmit among the processors do i
> connect all the DT0PRI and DR0PRI lines together?
> Also I assume the RSCLK0 and RFS0 are connected
> together as well. The TSCLK0 is not used and the
> TFS0 is a transmit valid flag, which doesn't need to
> be used either if not necessary. I was wondering
> how the RFS0 works now since all the devices are
> connected together who drives the RFS, does each
> processor take turns driving the RFS or does each
> SPORT know when its channel is due to transmit?
>
> Thanks,
> Brad
>
> a...
>
>
>
Jaime Andr Aranguren Cardona
j...@ieee.org
j...@computer.org
__________________________________________________
Reply by ●August 3, 20062006-08-03
hi Brad,
(1) What is the objective? What is the functionality of 3 processors? Do
you mean that each DSP will transmit as well receive (in different TDM
slots)? If so, then DT0PRI and DR0PRI of all the processors (in all 6
signals) needs to be shorted.
(2) Please make sure that no two/more processors (more accurately SPORTs
of processors) don't transmit in the same slot (you will be defining which
slot a particular DSP has to transmit). If two/more processor try to
transmit at same slot, you will damage the devices.
(3) However more than one processor can receive in a particular slot.
(4) out of 3 DSP you need to make one DSP as master (this DSP will
actually drive the CLK and FS). You will need to configure CLKDIV and FSDIV
(refer to HRM for exact names of control registers) of master device and
then enable the internal clock and internal fs (IFS, ICLK) option for master
device.
(5) In case you plan to provide CLK, FS from an external source (other
than 3 BF533), you can just make all 3 DSPs as slave and connect the CLK, FS
to external source...
I hope I have explained the protocol quite in details. In case you have
any further quesions, please feel free to ask.
Regards,
Kunal
On 8/2/06, b...@yahoo.com wrote:
>
> I want to connect 3 BF533s processors together using the SPORT in TDM. I
> wanted to make sure my thoughts were correct regarding the connections. In
> order to receive and transmit among the processors do i connect all the
> DT0PRI and DR0PRI lines together? Also I assume the RSCLK0 and RFS0 are
> connected together as well. The TSCLK0 is not used and the TFS0 is a
> transmit valid flag, which doesn't need to be used either if not
> necessary. I was wondering how the RFS0 works now since all the devices are
> connected together who drives the RFS, does each processor take turns
> driving the RFS or does each SPORT know when its channel is due to transmit?
>
> Thanks,
> Brad
>
(1) What is the objective? What is the functionality of 3 processors? Do
you mean that each DSP will transmit as well receive (in different TDM
slots)? If so, then DT0PRI and DR0PRI of all the processors (in all 6
signals) needs to be shorted.
(2) Please make sure that no two/more processors (more accurately SPORTs
of processors) don't transmit in the same slot (you will be defining which
slot a particular DSP has to transmit). If two/more processor try to
transmit at same slot, you will damage the devices.
(3) However more than one processor can receive in a particular slot.
(4) out of 3 DSP you need to make one DSP as master (this DSP will
actually drive the CLK and FS). You will need to configure CLKDIV and FSDIV
(refer to HRM for exact names of control registers) of master device and
then enable the internal clock and internal fs (IFS, ICLK) option for master
device.
(5) In case you plan to provide CLK, FS from an external source (other
than 3 BF533), you can just make all 3 DSPs as slave and connect the CLK, FS
to external source...
I hope I have explained the protocol quite in details. In case you have
any further quesions, please feel free to ask.
Regards,
Kunal
On 8/2/06, b...@yahoo.com wrote:
>
> I want to connect 3 BF533s processors together using the SPORT in TDM. I
> wanted to make sure my thoughts were correct regarding the connections. In
> order to receive and transmit among the processors do i connect all the
> DT0PRI and DR0PRI lines together? Also I assume the RSCLK0 and RFS0 are
> connected together as well. The TSCLK0 is not used and the TFS0 is a
> transmit valid flag, which doesn't need to be used either if not
> necessary. I was wondering how the RFS0 works now since all the devices are
> connected together who drives the RFS, does each processor take turns
> driving the RFS or does each SPORT know when its channel is due to transmit?
>
> Thanks,
> Brad
>
