JTAG problem

Hai,

I have designed a Custom board with BF561 EZ-KIT as the reference
design in which i have made certain changes to suit my application.
I've changed the Flash IC to MD8832-D1G-V18-X-P(M-systems) instead of
M29W640D(ST microelectronics) present in Ezkit lite board. JTAG
connector is connected with BF561 the details of which is given below

JTAG BF561(297 pin ball PBGA)
1 ---- GND
3----No connection
4, 7,9, 11 and 13 ---GND
2 --- EMU AE16(Emulation output)
6 --- TMS AF16(JTAG mode select)
8 -- TCK AF14(JTAG CLK)
10 -- TRST AE15( JTAG reset)
12 -- TDI AF15 (JTAG serial data in )
14 -- TDO AE14( JTAG serial data out)
5 -- pullup resistor

While trying to erase the flash memory i get the following error

MAIN1
$$$$$$$$$$$$$$$$$$$$$$$0$$$$$$$$$$$$$

INFO

(((((((((((( 0 ))))))))))))

Dual Core CPU found

Number of devices in JTAG chain: 2

JTAG wait cycles: 1
Detecting device...

Detected Device: BF-561 rev:3

Detecting device...

Detected Device: BF-561 rev:3

emulation_enter(): CPU was not in normal state [4]

Could not reset core

DMA error (stalled ?)

DMA error (stalled ?)

Could not reset core

emulation_leave(): Trying to leave emulation in reset state

Any help in this regard would be highly appreciated.

with regards
Karthik G Start a New Thread

>From the looks of it, the JTAG did not find the flash. I have never
played with a dual core device - does it make sense that each core is
on the JTAG chain independently? If you can, scope the TDO from processor
to TDI on the flash and make sure it is at least passing thru the flash.

Also, check the passthrough mode on the flash - how many bits are needed
compared to the previous flash ic? It may be the controller needs to be
told this ahead of time so it builds the bits correctly.

Patience, persistence, truth,
Dr. mike

On Thu, 24 Apr 2008, mallig_kar wrote:

> Hai,
>
> I have designed a Custom board with BF561 EZ-KIT as the reference
> design in which i have made certain changes to suit my application.
> I've changed the Flash IC to MD8832-D1G-V18-X-P(M-systems) instead of
> M29W640D(ST microelectronics) present in Ezkit lite board. JTAG
> connector is connected with BF561 the details of which is given below
>
> JTAG BF561(297 pin ball PBGA)
> 1 ---- GND
> 3----No connection
> 4, 7,9, 11 and 13 ---GND
> 2 --- EMU AE16(Emulation output)
> 6 --- TMS AF16(JTAG mode select)
> 8 -- TCK AF14(JTAG CLK)
> 10 -- TRST AE15( JTAG reset)
> 12 -- TDI AF15 (JTAG serial data in )
> 14 -- TDO AE14( JTAG serial data out)
> 5 -- pullup resistor
>
> While trying to erase the flash memory i get the following error
>
> MAIN1
> $$$$$$$$$$$$$$$$$$$$$$$0$$$$$$$$$$$$$
>
> INFO
>
> (((((((((((( 0 ))))))))))))
>
> Dual Core CPU found
>
> Number of devices in JTAG chain: 2
>
> JTAG wait cycles: 1
> Detecting device...
>
> Detected Device: BF-561 rev:3
>
> Detecting device...
>
> Detected Device: BF-561 rev:3
>
> emulation_enter(): CPU was not in normal state [4]
>
> Could not reset core
>
> DMA error (stalled ?)
>
> DMA error (stalled ?)
>
> Could not reset core
>
> emulation_leave(): Trying to leave emulation in reset state
>
> Any help in this regard would be highly appreciated.
>
> with regards
> Karthik G
> Start a New Thread