Hello,
I am using a ADSP21375 to read digital data from an ADC. I measured the frame
sync to be about 1MHz but when I measure a 1kHz sine wave I get two cycles in
1000 samples. This means that my data has only a sample rate of 500kHz. It would
be nice if somebody could help me with this problem.
This is my code:
#define SP_CLK_DIV 0x0004 //SPORT core clock divisor
#define SP_FS_DIV 0x0010 //SPORT frame sync divisor
...
unsigned int PCI = 0x00080000 ;
unsigned int OFFSET = 0x00080000 ;
unsigned int pm h0,h2,h3;
int TCB3[4] = {0};
...
*pIISP3A = 0;
*pIMSP3A = 0;
*pCSP3A = 0;
*pSPMCTL3 = 0;
*pSPCTL3 = 0 ;
h0 = (SLEN32|FSR|SDEN_A);
h2 = (SLEN32|FSR|SPTRAN|IFS|ICLK|LSBF|SDEN_A);
h3 = (SLEN18|FSR|IFS|SDEN_A|SCHEN_A);
TCB3[3] = (unsigned int)rADC; //Data block address (IISPxy)
TCB3[2] = 1; //Increment
(IMSPxy)
TCB3[1] =
NUM_SAMPLES;//viNumSamples; //Number of block elements
(CSPxy)
TCB3[0] = (unsigned int)TCB3 + 3 ; //Address next
TCB ( - OFFSET + 3 needed ) (CPSPxy)
*pIISP3A = (unsigned int) rADC;//Start address DMA-block
*pIMSP3A = 1;//Increment
*pCSP3A = NUM_SAMPLES;//Number of Samples in DMA-block
*pDIV3 = ((SP_FS_DIV << 16) | SP_CLK_DIV); // Adjust clock and
framesync
*pCPSP3A = (unsigned int) TCB3 + 3 + PCI; //Address for first
TCB
*pSPCTL3 = h3;
...
*pIISP3A = (unsigned int) rADC;//Start address DMA-block
*pCSP3A = NUM_SAMPLES;//Number of Samples in
DMA-block
*pSPCTL3 |= (h3|SPEN_A);
Chers,
Holger
