external memory address range for PAGE 0

Hi All,

I have assigned page0 as the chip enable for an external flash.
But the page0 is not becoming active low on accessing an address range in between 0x00081000 to 0x003fffff.

For that matter only my page2 is becoming active low in the address range 0x0080A000 to 0x00BFFFFF.page1 and page3 are also not becoming active low in their respective address ranges.

I am using only the A0-A19 of the address bus.

My memory map is as follows
MEMORY

{

RAM1 : origin=0x800000, length=0x03FF /* INTERNAL BLK 1
}

SECTIONS
{
.sect "START" : > RAM1
.sect "data1" : > RAM1
}

And I am defining the address as follows and I am using LDI and STI commands to access.
flashadd .set 0081000h

Is this the proper way to define the address.

Any help will be appreciated.

Thanking you
Bhaduri Start a New Thread

Bhaduri,

What addressing mode are you using? If you're using direct addressing,
make sure you're changing DP! Otherwise all your reads will be
0x80xxxx. Make sure your cache is off also for this sort of testing.

Bill

> -----Original Message-----
> From: c... [mailto:c...] On
> Behalf Of b...@yahoo.com
> Sent: Thursday, April 24, 2008 7:47 AM
> To: c...
> Subject: [c3x] external memory address range for PAGE 0
>
> Hi All,
>
> I have assigned page0 as the chip enable for an external flash.
> But the page0 is not becoming active low on accessing an
> address range in between 0x00081000 to 0x003fffff.
>
> For that matter only my page2 is becoming active low in the
> address range 0x0080A000 to 0x00BFFFFF.page1 and page3 are
> also not becoming active low in their respective address ranges.
>
> I am using only the A0-A19 of the address bus.
>
> My memory map is as follows
> MEMORY
>
> {
>
> RAM1 : origin=0x800000, length=0x03FF /*
> INTERNAL BLK 1
> }
>
> SECTIONS
> {
> .sect "START" : > RAM1
> .sect "data1" : > RAM1
> }
>
> And I am defining the address as follows and I am using LDI
> and STI commands to access.
> flashadd .set 0081000h
>
> Is this the proper way to define the address.
>
> Any help will be appreciated.
>
> Thanking you
> Bhaduri
> Start a New Thread

Hi Bill,

Thnx,and you are right it was the problem of DP.Could you please also tell me how to clear the cache.

Also if any of you know any discussion group on flash memories(I am using ATMEL's AT49BV163D)please let me know as I am facing problems in erasing it.
Thnx
Bhaduri
Hi All,
>
>I have assigned page0 as the chip enable for an external flash.
>But the page0 is not becoming active low on accessing an address range in between 0x00081000 to 0x003fffff.
>
>For that matter only my page2 is becoming active low in the address range 0x0080A000 to 0x00BFFFFF.page1 and page3 are also not becoming active low in their respective address ranges.
>
>I am using only the A0-A19 of the address bus.
>
>My memory map is as follows
>MEMORY
>
> {
>
> RAM1 : origin=0x800000, length=0x03FF /* INTERNAL BLK 1
>}
>
>SECTIONS
> {
> .sect "START" : > RAM1
> .sect "data1" : > RAM1
>}
>
> And I am defining the address as follows and I am using LDI and STI commands to access.
>flashadd .set 0081000h
>
>Is this the proper way to define the address.
>
>Any help will be appreciated.
>
>Thanking you
>Bhaduri
> Start a New Thread

Bhaduri,

I use the following macros:

#define ENABLE_CACHE() \
asm(" RPTS 0"); \
asm(" OR 1800h, ST")

#define DISABLE_CACHE() \
asm(" RPTS 0"); \
asm(" AND 0e7ffh, ST")

This information is available in your C33 user's manual.

I do not know of any flash discussion groups, but that is not to say
they do not exist. What problem are you seeing?

Bill

> -----Original Message-----
> From: c... [mailto:c...] On
> Behalf Of b...@yahoo.com
> Sent: Thursday, May 01, 2008 5:42 AM
> To: c...
> Subject: [c3x] Re: external memory address range for PAGE 0
>
> Hi Bill,
>
> Thnx,and you are right it was the problem of DP.Could you
> please also tell me how to clear the cache.
>
> Also if any of you know any discussion group on flash
> memories(I am using ATMEL's AT49BV163D)please let me know as
> I am facing problems in erasing it.
> Thnx
> Bhaduri
> Hi All,
> >
> >I have assigned page0 as the chip enable for an external flash.
> >But the page0 is not becoming active low on accessing an
> address range in between 0x00081000 to 0x003fffff.
> >
> >For that matter only my page2 is becoming active low in the
> address range 0x0080A000 to 0x00BFFFFF.page1 and page3 are
> also not becoming active low in their respective address ranges.
> >
> >I am using only the A0-A19 of the address bus.
> >
> >My memory map is as follows
> >MEMORY
> >
> > {
> >
> > RAM1 : origin=0x800000, length=0x03FF /*
> INTERNAL BLK 1
> >}
> >
> >SECTIONS
> > {
> > .sect "START" : > RAM1
> > .sect "data1" : > RAM1
> >}
> >
> > And I am defining the address as follows and I am using LDI
> and STI commands to access.
> >flashadd .set 0081000h
> >
> >Is this the proper way to define the address.
> >
> >Any help will be appreciated.
> >
> >Thanking you
> >Bhaduri
> > Start a New Thread