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Hi All ! It is written that according to the jumpers clkin is multiplied (from 0.5 to 10) in order to recieve the wanted frequency. But, what is the value of clkin ? It is written in datasheet that the dsk operates between 16-160 MHz. no value of clkin will satisfy the both conditions: 0.5*clkin = 16 MHz 10*clkin - 160 MHz Please help ! Thanks in advance ! |
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5416 CLKIN Value
Started by ●July 16, 2003
Reply by ●July 18, 20032003-07-18
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Dear sir,
Hi
They are two level intialization for PLL, hadrware and software.The
hardware level is just for intialization the board at boot level and you can
change it is run-time mode. The software-programmable PLL is controlled using
the 16-bit memory-mapped (address 0058h) clock mode register (CLKMD). The CLKMD
register is used to define the clock configuration of the PLL clock module.
Note that upon reset, the CLKMD register is initilized with the predetermined
value dependent only upon the state of the CLKMD1-CLKMD3 pins.
For more programming information, see the TMS320C54x DSP Refrence Set,
Volume 1: CPU and Peripherals (literature number
SPRU131).
Best regards,
Morteza Alizadeh
Yuri_Feigin <y...@yahoo.com> wrote: Hi All ! Best regards, Morteza Alizadeh |
