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Re: [Fwd: Re: code working on simulator but not on device?]

Started by Jeff Brower May 9, 2006
Megha-

> Results with no printf were:
> rx_wait was:
> 8
> 0
> 19
> 0
> 19
> 0
> 19
> 0
> and tx_wait were all 0.

Ok, these counts are really short, but at least they are consistent. The Tx values
are zero because once Rx is ready, Tx is most likely going to be ready at the same
time.

>
> Well as per as clock is concerned. DSP is running at 96MHz (as set in DSP/BIOS)
> and AIC23 is running at 12MHz (as set by PEP config). THe CLKMD is set as
> multiply by 8 (in DSP/BIOS).

The above counts are just too low for 96 MHz clockrate. First, set your multiplier
to 15 as I suggested before, and see if the counts increase about 1.5x. Second, can
you see what PEP5416_AIC23_xxx functions are doing? They should just check the
serial port RXRDY and TXRDY status bits, and do simple read or write if the status
bits indicate Ready. I'm assuming these functions don't sit there and wait; they
should return immediately. You have to verify that.

Also, do you have DSP/BIOS configured and enabled? If so, there could be another
task getting in the way.

-Jeff

> Jeff Brower wrote:
>
> Megha-
> > I did following:int rx_wait[8];
> > int tx_wait[8]; for(i=0;i<8;i++)
> > {
> > rx_wait[i] = 0;
>
> >
> > /* Copy data from microphone inputs to headphone output */
> > while (!PEP5416_AIC23_read16(hCodec, &buffer[i]))
> > rx_wait[i]++;
> > printf("rx wait is %d \n",rx_wait[i]);
>
> >
> > tx_wait[i] = 0;
> > while (!PEP5416_AIC23_write16(hCodec, buffer[i]))
> > tx_wait[i]++;
> > printf("tx wait is %d \n",tx_wait[i]);
>
> > }
> Don't put printf() statements in the loop -- that's a no-no for real-time
> operation and accurate measurement. Run the experiment again and tell me
> what are your xx_wait[] values. Just use memory watch window to learn
> the array values after the loop is finished -- no need for
> printf().Regarding CLKMD value below, if CLKIN is 12 MHz and multiplier
> is 8, then the 5416 should be running 96 MHz. You can try multiplier of
> 13 also, which would be 156 MHz (chip limit is 160).-Jeff
> > The values i got was
> > rx wait is 13
> > tx wait is 0
> > rx wait is 0
> > tx wait is 0
> > rx wait is 0
> > tx wait is 0
> > rx wait is 0
> > tx wait is 0
> > rx wait is 0
> > tx wait is 0
> > rx wait is 0
> > tx wait is 0
> > rx wait is 0
> > tx wait is 0
> > rx wait is 0
> > tx wait is 0
> > I tested with 10, 20 instead of 8. Sometimes rx was 13 twice but rest
> > all was same.
> > In DSP/BIOS I have set CLKOUT as 96MHz, CLKMD value is 7107 (multiply
> > by 8).
> > In the master mode, the TLV320AIC23 clock and sampling rates are
> > derived from a 12-MHz MCLK signal.
> > In the PEP config (PEP5416_AIC23_Config config) I have set CLKOUT as
> > 12MHz (and 6MHz) and CLKIN as 12MHz. These values can be either set to
> > 12 or 6MHz. In this config, base oversampling rate is set as 250fs and
> > thats 48KHz.
> > Maximum sampling rate can be 48KHz with filter type as 0 and 96KHz with
> > filter type as 3.
> > Kindly reply
> > Thanks
> > Megha
>
Dear Jeff
I tested with the highest speed possible (156MHz) with a multiplier of 13. Yes there was increase in the counts of rx
It was as follows:
25
0
35
0
34
0
35
0
and tx was 0 for all. well I cant see the definations of the function PEP5416_AIC23_read and write but ya I know what they do. The read16 will read a 16-bit signed value from the codec data port and will return false if the data port is busy. Same goes with write16. Ya they wont wait, they will take the data as it comes.
Yes the DSP/BIOS is configured but only for memory mapping and global settings. I am not using any interrupts or anything in DSP/BIOS.
Jeff, in this case the counts are coming 34/35 for rcv but in case when I added filter function both of them were 0. Is it becasue filter() is taking so long that when the PC comes to read() it reads immediately without halting?
Kindly provide suggestions.
thanking You
Megha Daga

Jeff Brower wrote: Megha- Results with no printf were:
rx_wait was:
8
0
19
0
19
0
19
0
and tx_wait were all 0.
Ok, these counts are really short, but at least they are consistent. The Tx values are zero because once Rx is ready, Tx is most likely going to be ready at the same time.

Well as per as clock is concerned. DSP is running at 96MHz (as set in DSP/BIOS) and AIC23 is running at 12MHz (as set by PEP config). THe CLKMD is set as multiply by 8 (in DSP/BIOS).
The above counts are just too low for 96 MHz clockrate. First, set your multiplier to 15 as I suggested before, and see if the counts increase about 1.5x. Second, can you see what PEP5416_AIC23_xxx functions are doing? They should just check the serial port RXRDY and TXRDY status bits, and do simple read or write if the status bits indicate Ready. I'm assuming these functions don't sit there and wait; they should return immediately. You have to verify that.
Also, do you have DSP/BIOS configured and enabled? If so, there could be another task getting in the way.
-Jeff
Jeff Brower wrote: Megha-
I did following:int rx_wait[8];
int tx_wait[8]; for(i=0;i<8;i++)
{
rx_wait[i] = 0;
/* Copy data from microphone inputs to headphone output */
while (!PEP5416_AIC23_read16(hCodec, &buffer[i])) rx_wait[i]++;
printf("rx wait is %d \n",rx_wait[i]);
tx_wait[i] = 0;
while (!PEP5416_AIC23_write16(hCodec, buffer[i])) tx_wait[i]++;
printf("tx wait is %d \n",tx_wait[i]); }
Don't put printf() statements in the loop -- that's a no-no for real-time operation and accurate measurement. Run the experiment again and tell me what are your xx_wait[] values. Just use memory watch window to learn the array values after the loop is finished -- no need for printf().Regarding CLKMD value below, if CLKIN is 12 MHz and multiplier is 8, then the 5416 should be running 96 MHz. You can try multiplier of 13 also, which would be 156 MHz (chip limit is 160).-Jeff
The values i got was
rx wait is 13
tx wait is 0
rx wait is 0
tx wait is 0
rx wait is 0
tx wait is 0
rx wait is 0
tx wait is 0
rx wait is 0
tx wait is 0
rx wait is 0
tx wait is 0
rx wait is 0
tx wait is 0
rx wait is 0
tx wait is 0
I tested with 10, 20 instead of 8. Sometimes rx was 13 twice but rest all was same.
In DSP/BIOS I have set CLKOUT as 96MHz, CLKMD value is 7107 (multiply by 8).
In the master mode, the TLV320AIC23 clock and sampling rates are derived from a 12-MHz MCLK signal.
In the PEP config (PEP5416_AIC23_Config config) I have set CLKOUT as 12MHz (and 6MHz) and CLKIN as 12MHz. These values can be either set to 12 or 6MHz. In this config, base oversampling rate is set as 250fs and thats 48KHz.
Maximum sampling rate can be 48KHz with filter type as 0 and 96KHz with filter type as 3.
Kindly reply
Thanks
Megha

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