|
I have tried to use an example from Texas to make boot code for a 5402 DSP. This example is given in the document "Bootload of C code for the TMS320C5x" ( SPAR 235 ). I have tried to link my project with a similar linker command file, but I get warnings and errors. The linker command file: -c -o BUILD3.OUT -m BUILD3.MAP -f 0 -stack 128 -heap 1024 -x -l rts.lib -l c54xdsp.lib MEMORY { PAGE 0: PROG: origin=0x0800, length=0x37FF PAGE 1: DATA: origin=0x0060, length=0x07FA } SECTIONS { bootsect: { rts.lib(.text) = 800h *(.text) .cinit=.; *(.cinit) .+=1; *(.bss) *(.stack) *(.sysmem) } load00h PAGE 0 } Output from linker: ---------------------------- TMS320C54x COFF Linker Version 3.10 Copyright (c) 1996-1998 Texas Instruments Incorporated >> BUILD3.CMD, line 20: warning: rts.lib(.text) not found undefined first referenced symbol in file --------- ---------------- __STACK_SIZE d:\program files\C54XCGT\rts.lib __SYSMEM_SIZE d:\program files\C54XCGT\rts.lib >> symbol referencing errors - NEWDCSBUILD3.OUT not built Build Complete, 2 Errors, 0 Warnings. ---------------------------- The linker has obviously found the rts.lib file. So I do not know why it generates the warning. As far as I know, the _STACK_SIZE and _SYSMEM_SIZE is made by the linker itself when the -c option is used. I hope someone of you out there have been able to make boot code for your DSP. So, please give me a few hints on how I can do it. Best regards Torgeir Jakobsen e-mail: |
|
|
Boot code with C
Started by ●August 12, 1999
Reply by ●August 25, 19991999-08-25
|
Hi Texas send me the following answer: Dear Mr. JAKOBSEN Thank you for contacting Texas Instruments concerning your following inquiry: { I have tried to use an example from Texas to make boot code for a 5402 DSP. This example is given in the document "Bootload of C code for the TMS320C5x" ( SPRA 235 ). I have tried to link my project with a similar linker command file, but I get warnings and errors. The linker command file: -c -o BUILD3.OUT -m BUILD3.MAP -f 0 -stack 128 -heap 1024 -x -l rts.lib -l c54xdsp.lib MEMORY { PAGE 0: PROG: origin=0x0800, length=0x37FF PAGE 1: DATA: origin=0x0060, length=0x07FA } SECTIONS { bootsect: { rts.lib(.text) = 800h *(.text) .cinit=.; *(.cinit) .+=1; *(.bss) *(.stack) *(.sysmem) } load00h PAGE 0 } Output from linker: ---------------------------- TMS320C54x COFF Linker Version 3.10 Copyright (c) 1996-1998 Texas Instruments Incorporated >> BUILD3.CMD, line 20: warning: rts.lib(.text) not found undefined first referenced symbol in file --------- ---------------- __STACK_SIZE d:\program files\C54XCGT\rts.lib __SYSMEM_SIZE d:\program files\C54XCGT\rts.lib >> symbol referencing errors - NEWDCSBUILD3.OUT not built Build Complete, 2 Errors, 0 Warnings. ---------------------------- The linker has obviously found the rts.lib file. So I do not know why it generates the warning. As far as I know, the _STACK_SIZE and _SYSMEM_SIZE is made by the linker itself when the -c option is used. } First of all some words concerning _STACK_SIZE and _SYSMEM_SIZE: Boot.asm (within rts.lib) declares the stack size. The size is determined by the linker option -stack size. Thus, including -stack 0x400 for a 1K words stack in your linker command file should do. A temporary heap memory pool is created by using a .usect called .sysmem The size of the section .sysmem is determined by the linker via the -heap option Thus, please include -stack 0x400 for a 1K words heap in your linker command file. Thus, I'm not sure why the linker doesn't accept these options in order to implement the concepts recommended in SPRA235. However, please pay attention to the following facts: SPRA235 discusses how boot code can be generated using C code. Specifically addressed is how to use the -c option in the linker to build a single code section that includes the .text, .cinit, .bss, etc., sections that you want to be in the boot code. A single section is only needed if the the bootloader can't lood multiple sections. You will find in our documentations that some of the on-chip boot loaders (e.g. the older C54x types) can load only one single section. This is correct - for the older devices and many customers would like to make extensive use of sections. The hex utility will build as many sections as you want, but it will not merge them into one single section. One single section is required if the bootloader can only load one single section / block. This may present a problem, when you are intend to load C code or multiple sections. The TMS320C54x C compiler creates for example several sections or blocks when it compiles C source code. Some applications may require that all sections associated with the program be included in the boot to have a complete executable program. In this case, the individual sections must be combined into a single section for boot or the bootloader must be able to handle multiple sections. In order to support the multiple sections boot and to reinitialize related register values, the boot table data stream with the source program needs to be in a special format as described for example in the C548/C549 bootloader document. The newer C54xx devices (C548, C549, C5402, C5410, C5409 etc.) ALL SUPPORT MULTIPLE SECTIONS BOOTLOAD. Therefore, the following explanations do not need to be used to build the table!!! { Just the older C54x devices (C541,C542 etc.) require a single section boot-table. The hex conversion utility does not combine individual sections - therefore, you must use then the linker to group those sections. The sections that the compiler creates are divided into two categories: initialized sections (sections that contain data or code) and uninitialized sections (sections that reserve space but contain no actual data). Initialized sections created by the TMS320C54x C compiler include .text, .cinit, .const, and .data. Warning: Uninitialized sections are ignored by the hex conversion utility and are not converted. Concluding, you may have to use the linker command file to create a single single 'merged' section for the older bootloaders. Please refer to Appendix C, The Hex Conversion Utility, Generating a boot table in the C54x ASM Lang Tools Users Guide spru102 for a more detailed explanation of how to do this. Thes user's guide can be downloaded from or web site at http://www.ti.com/sc/docs/psheets/man_dsp.htm Please note that the example for the C54x hex conversion utility in this user's guide, pages C17-C23, does not state what options are used to compile the example. The example is the example for generating a boot table for LowPower Core Devices. If the example is compiled without the -v548 option, the hex file produced does not look like the one on page C-23. However, if it is compiled with -v548, the hex file produced looks a lot more like what is documented. The DSP performs consecutive reads from an external device which can be a Host on the HPI, EPROM, parallel I/O or serial port. The data which is read by the DSP must be in a particular format called a boot table. As with any 'C54x device , the boot table contains information on the destination address, section size, data format and other information. The 'C548/549 bootloader requires a different boot table format to support the extra functionality of the serial ports, and the extended address range. In fact, there are serveral registers which can be initialized in order to maximize the bootloader efficiency. For example, the 'C548 boot table includes information to re-program the Software Wait State generator and Bank Switch register for EPROM bootloads. If the serial ports are being used for bootloading, the same boot table locations act as register values for initialization of the serial port configuration registers. As a result, the bootloader supports full-function TDM and BSP bootloading. Normally, as with the earlier (e.g. C542) bootloader, registers are not reprogrammable and forces the serial ports into the Standard Mode of operation. However, the 'C548/C549 HPI and I/O (using XF and BIO) bootloading has the same functionality as the 'C542. To generate for example the correct boot table for the 548/549, you MUST use version 1.20 or later of the code generation tools and you must use the -v548 assembler option. This option flags the object file as destined for the 548/549 and then the hex utility will generate the correct boot table. Otherwise, the hex utility will generate the boot table format for the earlier 54x devices. However, if a file compiled/assembled with the code generation tools V1.20 then you need to take care about the following reported problem: If -v548 is used and linked with the default rts.lib (or other non-v548 files), and the -v548 file is not the first file given to the linker on the command line, then the linker will not flag the output file as a c548 file!!!! This means that the hex converter will not recognize the output file as a c548 file, which could affect processing of the boot table. The workaround is to place the -v548 file first on the command line to the linker, or to compile with -mf -v548 and link with the extended runtime library (rts_ext.lib). This problem does not appear in the currently available code generation tools version 3.10. } Concluding, you should be able to build a multiple sections boot-table using the current code generation tools v3.10, a conventional linker command file and the right linker switches. However, the bootloader is implemented differently on the C548/9 and C5402 devices than described in the C54x applications guide SPRU173. The C5402 in particular can be used to automatically transfer user code after reset, from an external source to anywhere in the program memory. If the MP/!MC pin is sampled low during a hardware reset, the C5402 executes the bootloader program. The standard C5402 bootloader provides several options for the source of code to download: Parallel from 8-bit or 16-bit-wide EPROM Parallel from I/O space 8-bit or 16-bit mode Serial boot from McBSPs 8-bit or 16-bit mode Host Port Interface boot A combination of interrupt flags and the bit values of an external memory location determine the selection between the various boot options. The main difference between the C5402 bootloader and that of previous C54x devices is the HPI boot mode. The new HPI boot mode allows the host to load the on-chip RAM AFTER the device is reset, and NOT WHILE the device is in reset. After the 5402 is taken out of reset, the host loads the boot code through the HPI-8. This new HPI boot mode is required because the C5402 HPI has access to the entire on-chip RAM, and it does not support transfers while the reset pin is asserted. The HPI-8 is an enhanced version of the 8-bit HPI on the 548/549. The HPI-8 communicates with memory through the DMA controller instead of a dedicated addressing unit. Consequently, the HPI-8 can now access all on-chip memory and is no longer limited to the 2-K block limitation of the 548/549. I have attached a prelimenary document 5402rom.pdf which describes the bootloader and the rom code content. Also you may find the C548/C549 bootloading document helpful, which can be downloaded from our web page at http://www.ti.com/sc/docs/dsps/hotline/techbits/c5xxfiles.htm Please note that these docs are preliminary and some information may change in the final version. Finally, please note that the TMS320C54x CPU and Peripheral Reference manual volume 1 has been updated. The new release SPRU131F is now available at the internet http://www-s.ti.com/sc/psheets/spru131f/spru131f.pdf and covers the new C54x derivatives : 5402, 5410 and 5420. I hope you find this information helpful but please don't hesitate to contact us again if you have further questions. Please use then the EPIC case ID above if your inquiry relates to this problem. For Online assistance, please visit our Online Technical Support Site for DSPs at http://www.ti.com/sc/dsphelp TI offers Data Converters and Power Supply products that are specifically designed to work with our family of powerful DSPs. We announced for example the industry's first family of low dropout (LDO) voltage regulators/supervisors to support the dual-supply voltage needs of low-power digital signal processors. The devices regulate 3.3 volts and a second fixed (1.8V or 2.5V) or programmable voltage in a single 28-pin integrated circuit (IC) package, thus eliminating three ICs from single-core DSP designs and even more from complex applications using multiple DSPs. Please visit http://www.ti.com/sc/docs/news/1999/99002.h tm and http://www.ti.com/sc/docs/msp/dsps.htm for more information about DSP solutions. Best Regards, Phil Alder Application Support Engineer European Product Information Centre Texas Instruments ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||| ||||||||||| ||| ||| |||||||||| ||||||||||| ||||||||||||||| ||| ||| ||| |||||||||||||| ||||||||||| |||||| ||| ||| ||| |||||||||||||| ||||||||||| ||||||||||||||| |||||||| ||| |||||||||||||| ||||||||||| ||||||||||| |||||||| ||| |||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||| |||| ||| Email: ||| || Internet: http://www.ti.com || ||| Fax: +44 (0) 1604 66 3334 ||| |||| |||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| =========================================================== | Fuer Rueckfragen stehen wir Ihnen gerne zur Verfuegung | | Deutsch: +49 (0) 8161 80 33 11 | =========================================================== | Voor meer informatie of andere vragen zijn wij u graag | | van dienst. | | Dutch: +44 (0) 1604 66 33 45 ( ENGLISH ONLY ) | =========================================================== | Should you have any other questions then please contact | | us again. | | English: +44 (0) 1604 66 33 99 | =========================================================== | Pour toute question complementaire, n'hesitez pas a | | nous recontacter. | | Francais: +33 (0) 1 30 70 11 64 | =========================================================== | Se avete altre domande, non esitate a contattarcci | | di nouvo. | | Italiano: +33 (0) 1 30 70 11 67 | =========================================================== | Si tienen alguna otra cuestion, por favor no duden en | | llamarnos de nuevo. | | Espanol: +34 (0) 90 23 54 0 28 | =========================================================== | Ifall du har nagra ytterligare fragor, vanligen | | kontakta oss igen. | | Nordic: +44 (0) 1604 66 33 50 ( ENGLISH ONLY ) | =========================================================== | | | **** | | **** European Product Information Centre | | ***** o **** Texas Instruments Ltd | | ********_///_**** 800 Pavilion Drive | | ******/_//_/***** Northampton Business Park | | ** ***(__/***** Northampton | | ********* NN4 7YL | | ***** United Kingdom | | *** | | | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| wrote: original article:http://www.egroups.com/group/c54x/?start3 > I have tried to use an example from Texas to make boot code for a > 5402 DSP. This example is given in the document "Bootload of C code for > the > TMS320C5x" ( SPAR 235 ). > I have tried to link my project with a similar linker command file, but > I > get warnings and errors. > > The linker command file: > > -c > -o BUILD3.OUT > -m BUILD3.MAP > -f 0 > -stack 128 > -heap 1024 > -x > -l rts.lib > -l c54xdsp.lib > > MEMORY > { > PAGE 0: PROG: origin=0x0800, length=0x37FF > PAGE 1: DATA: origin=0x0060, length=0x07FA > } > > SECTIONS > { > bootsect: { rts.lib(.text) = 800h > *(.text) > .cinit=.; > *(.cinit) > .+=1; > *(.bss) > *(.stack) > *(.sysmem) } load00h PAGE 0 > } > > Output from linker: > ---------------------------- > TMS320C54x COFF Linker Version 3.10 > Copyright (c) 1996-1998 Texas Instruments Incorporated > >> BUILD3.CMD, line 20: warning: rts.lib(.text) not found > > undefined first referenced > symbol in file > --------- ---------------- > __STACK_SIZE d:\program files\C54XCGT\rts.lib > __SYSMEM_SIZE d:\program files\C54XCGT\rts.lib > >> symbol referencing errors - NEWDCSBUILD3.OUT not built > Build Complete, > 2 Errors, 0 Warnings. |
