Can someone tell me how to invoke secondary communications with the AD50 CODEC on the C5402 DSK (in assembly) ? From the AD50 data sheet, secondary communications can be invoked by writing D0=1 (software secondary request)to DIN, or setting FC=1 (Hardware Secondary communication request). The FC is driven by the CPLD. I think that the control of FC is mapped into the DSP memory space, but,do not know how to set it to 1. Any help we be appreciated. |
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C5402 DSK TLC320AD50 SECONDARY COMMUNICATION
Started by ●October 2, 2001
Reply by ●October 2, 20012001-10-02
Maurizio- >Can someone tell me how to invoke secondary communications with the >AD50 CODEC on the C5402 DSK (in assembly) ? > >>From the AD50 data sheet, secondary communications can be invoked by >writing D0=1 (software secondary request)to DIN, or setting FC=1 >(Hardware Secondary communication request). The FC is driven by the >CPLD. I think that the control of FC is mapped into the DSP memory >space, but,do not know how to set it to 1. Here is some code we originally got from Wei Wen Dai, who is a C54xx expert. Note that we are not using DMA with C5402 McBSP interrupts (not much need since sampling rates are so low), so we commented that part out. Jeff Brower DSP sw/hw engineer Signalogic | |||
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Reply by ●October 8, 20012001-10-08
Good day. Here's my 2 cents worth :) According to the C5402 DSK memory map, CPLD-based control registers are mapped to I/O space at 0000-4000H. The control bit of AD50 is found at CNTL2 register at IO address 4h. Bit 3 - FC for MIC/SPK AD50 Bit 2 - FC for DAA AD50 To set the bit, use the portw command. Hope this helps. Regards, Doreen --- In c54x@y..., maurizio@s... wrote: > Can someone tell me how to invoke secondary communications with the > AD50 CODEC on the C5402 DSK (in assembly) ? > > From the AD50 data sheet, secondary communications can be invoked by > writing D0=1 (software secondary request)to DIN, or setting FC=1 > (Hardware Secondary communication request). The FC is driven by the > CPLD. I think that the control of FC is mapped into the DSP memory > space, but,do not know how to set it to 1. > Any help we be appreciated. |