GPIO on 5509a timing

Hi,

I have a questions about GPIO timing when I toggle them. It takes one
cycle to change the pin high and one cycle to set it back to low. So
when the DSP is clocked with 48 Mhz and I measure the pin with a logic
analyzer I would expect to see a delta of about < 50ns. But what I
measure is something > 200ns. Are there any explanations for this? Is
the peripheral bus the reason? Start a New Thread

Be. TEK-

> I have a questions about GPIO timing when I toggle them. It takes one
> cycle to change the pin high and one cycle to set it back to low. So
> when the DSP is clocked with 48 Mhz and I measure the pin with a logic
> analyzer I would expect to see a delta of about < 50ns. But what I
> measure is something > 200ns. Are there any explanations for this? Is
> the peripheral bus the reason?

Enter into Google:

bus stall site:dsprelated.com

and read the first thread.

-Jeff Start a New Thread