Hi All,
I'm using the McBSP's on the c5510 device and I'm having issues
with
the states of the SPCR registers, after I initialise the McBSP with
the following commands:
/* Start MCBSP1, Probe Comms IF, Sample Rate Gen. and Frame Sync */
MCBSP_start(hMcbsp1, MCBSP_SRGR_START | MCBSP_SRGR_FRAMESYNC, 0x300);
/* Enable MCBSP1 transmit and receive */
MCBSP_start(hMcbsp1, MCBSP_XMIT_START | MCBSP_RCV_START, 0);
What happens is that, ocassionally, the RRDY flag is set, indicating
that data is ready to be read, when I know that I have not
transmitted anything from the other end.
Alternatively, XRDY can be cleared, indicating that data is waiting
to be transmitted, when I haven't even attempted to load DXR1.
In order to avoid this behaviour giving me problems, I am wondering
if there is a way to some how flush the McBSP to an expected state
i.e. RRDY clear, XRDY set.
Any help you can provide would be greatly appreciated.
Cheers,
Scotty
Flushing McBSP on c5510
Started by ●July 16, 2007
Reply by ●July 16, 20072007-07-16
Scotty-
> I'm using the McBSP's on the c5510 device and I'm having issues with
> the states of the SPCR registers, after I initialise the McBSP with
> the following commands:
>
> /* Start MCBSP1, Probe Comms IF, Sample Rate Gen. and Frame Sync */
> MCBSP_start(hMcbsp1, MCBSP_SRGR_START | MCBSP_SRGR_FRAMESYNC, 0x300);
> /* Enable MCBSP1 transmit and receive */
> MCBSP_start(hMcbsp1, MCBSP_XMIT_START | MCBSP_RCV_START, 0);
>
> What happens is that, ocassionally, the RRDY flag is set, indicating
> that data is ready to be read, when I know that I have not
> transmitted anything from the other end.
>
> Alternatively, XRDY can be cleared, indicating that data is waiting
> to be transmitted, when I haven't even attempted to load DXR1.
>
> In order to avoid this behaviour giving me problems, I am wondering
> if there is a way to some how flush the McBSP to an expected state
> i.e. RRDY clear, XRDY set.
After a McBSP reset, you can always do a couple of DRR register reads to clear RRDY.
But the only way XRDY can be clear is if some data was left over (still not
transmitted) from before the McBSP reset.
What mode are you using for McBSP interface? Who drives the clock, your DSP or the
other end? Is the clock always running? If the clock is always running, then you
will always receive, regardless of whether the other end has "sent something" or not.
-Jeff
> I'm using the McBSP's on the c5510 device and I'm having issues with
> the states of the SPCR registers, after I initialise the McBSP with
> the following commands:
>
> /* Start MCBSP1, Probe Comms IF, Sample Rate Gen. and Frame Sync */
> MCBSP_start(hMcbsp1, MCBSP_SRGR_START | MCBSP_SRGR_FRAMESYNC, 0x300);
> /* Enable MCBSP1 transmit and receive */
> MCBSP_start(hMcbsp1, MCBSP_XMIT_START | MCBSP_RCV_START, 0);
>
> What happens is that, ocassionally, the RRDY flag is set, indicating
> that data is ready to be read, when I know that I have not
> transmitted anything from the other end.
>
> Alternatively, XRDY can be cleared, indicating that data is waiting
> to be transmitted, when I haven't even attempted to load DXR1.
>
> In order to avoid this behaviour giving me problems, I am wondering
> if there is a way to some how flush the McBSP to an expected state
> i.e. RRDY clear, XRDY set.
After a McBSP reset, you can always do a couple of DRR register reads to clear RRDY.
But the only way XRDY can be clear is if some data was left over (still not
transmitted) from before the McBSP reset.
What mode are you using for McBSP interface? Who drives the clock, your DSP or the
other end? Is the clock always running? If the clock is always running, then you
will always receive, regardless of whether the other end has "sent something" or not.
-Jeff
