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Intermittent HPI bootloading of c5502 using MSP430F149

Started by mxpotluri October 27, 2007
Hello,

In our project we are using the TMS320C5502 DSP processor which is
bootloaded using the hostport interface (8bit multiplexed mode) with
the MSP430F149 as the host. The problem we have is the bootloader is
intermittent. Whenever the bootloader fails on connecting the jtag and
observing the contents of the DSP memory locations. We can observe
that certain memory locations have different data then what is being
written by the microcontroller. When the bootloader works correctly
the DSP memory content matches the HPI data being written to it.
We have looked at the HPI timings and they are all correct.
If anyone else has face this same problem earlier or has any
suggestions it will really helps us.

Thanks in advance.

Regards
Madhurima
Madhurima-

> In our project we are using the TMS320C5502 DSP processor which is
> bootloaded using the hostport interface (8bit multiplexed mode) with
> the MSP430F149 as the host. The problem we have is the bootloader is
> intermittent. Whenever the bootloader fails on connecting the jtag and
> observing the contents of the DSP memory locations. We can observe
> that certain memory locations have different data then what is being
> written by the microcontroller. When the bootloader works correctly
> the DSP memory content matches the HPI data being written to it.
> We have looked at the HPI timings and they are all correct.
> If anyone else has face this same problem earlier or has any
> suggestions it will really helps us.

A couple of comments / questions.

1) Did you verify HPI access to internal DSP memory first? After the DSP comes out
of reset, you should write to several areas in DSP memory in succession, then go back
and read those areas, and verify correct data for each. Some type of "HPI stress
test" has to be done before host bootload can be expected to work.

2) Does the microcontroller verify HRDY signal before making HPI accesses? Do you
have /HCS enabled prior to checking HRDY?

3) When it fails, which memory locations have bad data?

-Jeff
Madhurima-

> 1) We did verify HPI access by first writing to some DSP memory
> locations and then verifying.

Ok, but did you specifically perform consecutive block writes to different addresses,
then go back and read those blocks? You can't do just a few write+read combinations
and hope it's good; that allows bus-hold and stale data problems to go undetected.

> 2) The microcontroller looks at the HRDY signal before making a HPI
> access and we do enable HCS before checking HRDY.

Ok.

> 3) Everytime it fails the memory locations that have bad data are
> different. Sometimes two memory locations have the same data and then
> there is a shift in the data by one location. For example memory
> location 0x0120 and 0x0121 have the data that is intended for 0x0120
> which then results in the data of location 0x0121 being written to
> 0x0122 and the data just shifts for all other locations.

The address shift is significant. One possibility is that HBIL or /DS timing is not
correct. Another possibility is that you're using auto-increment mode and somehow
the 5502 HPI thinks two accesses got made... you should look for glitches in /DS.

As a general comment, if this issue occurs during bootload, then the problem ought to
be easy to find with a memory stress test. Why wouldn't it? The bootload process is
nothing different than a lot of memory access. I suspect your testing is not solid.

-Jeff

PS. Please post to the group, not to me.

> -----Original Message-----
> From: Jeff Brower [mailto:j...@signalogic.com]
> Sent: Tuesday, October 30, 2007 10:29 AM
> To: Madhurima Potluri
> Cc: c...
> Subject: Re: [c55x] Intermittent HPI bootloading of c5502 using
> MSP430F149
>
> Madhurima-
>
> > In our project we are using the TMS320C5502 DSP processor which is
> > bootloaded using the hostport interface (8bit multiplexed mode) with
> > the MSP430F149 as the host. The problem we have is the bootloader is
> > intermittent. Whenever the bootloader fails on connecting the jtag and
>
> > observing the contents of the DSP memory locations. We can observe
> > that certain memory locations have different data then what is being
> > written by the microcontroller. When the bootloader works correctly
> > the DSP memory content matches the HPI data being written to it.
> > We have looked at the HPI timings and they are all correct.
> > If anyone else has face this same problem earlier or has any
> > suggestions it will really helps us.
>
> A couple of comments / questions.
>
> 1) Did you verify HPI access to internal DSP memory first? After the
> DSP comes out of reset, you should write to several areas in DSP memory
> in succession, then go back and read those areas, and verify correct
> data for each. Some type of "HPI stress test" has to be done before
> host bootload can be expected to work.
>
> 2) Does the microcontroller verify HRDY signal before making HPI
> accesses? Do you have /HCS enabled prior to checking HRDY?
>
> 3) When it fails, which memory locations have bad data?
>
> -Jeff
Jeff,

We have done tests by writing blocks of data and then reading them
back. We wrote 100 bytes at a time and had the microcontroller read back
and verify. We also included a routine in the microcontroller to rewrite
if the verification failed from the location where the failure was
observed. We repeated this verification process for some iterations.
This also enabled us to observe the HR/W line on the scope.

Initially we were using auto-increment and then switched to manual
increment but this did not solve the problem.

I will look into the HDS timing and do some more memory writes and
reads.

Thank you for the suggestions.

Regards
Madhurima

-----Original Message-----
From: Jeff Brower [mailto:j...@signalogic.com]
Sent: Tuesday, October 30, 2007 11:25 AM
To: Madhurima Potluri
Cc: c...
Subject: Re: [c55x] Intermittent HPI bootloading of c5502 using
MSP430F149

Madhurima-

> 1) We did verify HPI access by first writing to some DSP memory
> locations and then verifying.

Ok, but did you specifically perform consecutive block writes to
different addresses, then go back and read those blocks? You can't do
just a few write+read combinations and hope it's good; that allows
bus-hold and stale data problems to go undetected.

> 2) The microcontroller looks at the HRDY signal before making a HPI
> access and we do enable HCS before checking HRDY.

Ok.

> 3) Everytime it fails the memory locations that have bad data are
> different. Sometimes two memory locations have the same data and then
> there is a shift in the data by one location. For example memory
> location 0x0120 and 0x0121 have the data that is intended for 0x0120
> which then results in the data of location 0x0121 being written to
> 0x0122 and the data just shifts for all other locations.

The address shift is significant. One possibility is that HBIL or /DS
timing is not correct. Another possibility is that you're using
auto-increment mode and somehow the 5502 HPI thinks two accesses got
made... you should look for glitches in /DS.

As a general comment, if this issue occurs during bootload, then the
problem ought to be easy to find with a memory stress test. Why
wouldn't it? The bootload process is nothing different than a lot of
memory access. I suspect your testing is not solid.

-Jeff

PS. Please post to the group, not to me.

> -----Original Message-----
> From: Jeff Brower [mailto:j...@signalogic.com]
> Sent: Tuesday, October 30, 2007 10:29 AM
> To: Madhurima Potluri
> Cc: c...
> Subject: Re: [c55x] Intermittent HPI bootloading of c5502 using
> MSP430F149
>
> Madhurima-
>
> > In our project we are using the TMS320C5502 DSP processor which is
> > bootloaded using the hostport interface (8bit multiplexed mode) with

> > the MSP430F149 as the host. The problem we have is the bootloader is

> > intermittent. Whenever the bootloader fails on connecting the jtag
> > and
>
> > observing the contents of the DSP memory locations. We can observe
> > that certain memory locations have different data then what is being

> > written by the microcontroller. When the bootloader works correctly
> > the DSP memory content matches the HPI data being written to it.
> > We have looked at the HPI timings and they are all correct.
> > If anyone else has face this same problem earlier or has any
> > suggestions it will really helps us.
>
> A couple of comments / questions.
>
> 1) Did you verify HPI access to internal DSP memory first? After the
> DSP comes out of reset, you should write to several areas in DSP
> memory in succession, then go back and read those areas, and verify
> correct data for each. Some type of "HPI stress test" has to be done
> before host bootload can be expected to work.
>
> 2) Does the microcontroller verify HRDY signal before making HPI
> accesses? Do you have /HCS enabled prior to checking HRDY?
>
> 3) When it fails, which memory locations have bad data?
>
> -Jeff