By using the instruction LDW to load data from memory,
1 bit of the data read out is incorrect.
How can this happen?
What kind of problem shoud it be?
Thanks!
LDW instruction get incorrect data
Started by ●July 3, 2008
Reply by ●July 3, 20082008-07-03
if you did LDW to non aligned address you will get incorrect data
i...@163.com
Sent by: c...
03/07/2008 11:16
Please respond to
i...@163.com
To
c...
cc
Subject
[c6x] LDW instruction get incorrect data
By using the instruction LDW to load data from memory,
1 bit of the data read out is incorrect.
How can this happen?
What kind of problem shoud it be?
Thanks!
i...@163.com
Sent by: c...
03/07/2008 11:16
Please respond to
i...@163.com
To
c...
cc
Subject
[c6x] LDW instruction get incorrect data
By using the instruction LDW to load data from memory,
1 bit of the data read out is incorrect.
How can this happen?
What kind of problem shoud it be?
Thanks!
Reply by ●July 3, 20082008-07-03
iamxiaod,
On Thu, Jul 3, 2008 at 3:16 AM, wrote:
> By using the instruction LDW to load data from memory,
> 1 bit of the data read out is incorrect.
> How can this happen?
> What kind of problem shoud it be?
The more general the question, the more general the answer. Try to
provide as many details as possible.
1. Is the problem in internal or external memory??
2. Does the problem occur at 1 address, a group of addresses, or all addresses??
3. Do you see the problem in the CCS 'view memory' window??
4. Is the bit always high, always low, or some other pattern??
mikedunn
>
> Thanks!
--
www.dsprelated.com/blogs-1/nf/Mike_Dunn.php
On Thu, Jul 3, 2008 at 3:16 AM, wrote:
> By using the instruction LDW to load data from memory,
> 1 bit of the data read out is incorrect.
> How can this happen?
> What kind of problem shoud it be?
The more general the question, the more general the answer. Try to
provide as many details as possible.
1. Is the problem in internal or external memory??
2. Does the problem occur at 1 address, a group of addresses, or all addresses??
3. Do you see the problem in the CCS 'view memory' window??
4. Is the bit always high, always low, or some other pattern??
mikedunn
>
> Thanks!
--
www.dsprelated.com/blogs-1/nf/Mike_Dunn.php
Reply by ●July 3, 20082008-07-03
Hi,
>if you did LDW to non aligned address you will get incorrect data
- The address is aligned.
>By using the instruction LDW to load data from memory,
>1 bit of the data read out is incorrect.
>How can this happen?
>What kind of problem shoud it be?
>
>Thanks!
>
>if you did LDW to non aligned address you will get incorrect data
- The address is aligned.
>By using the instruction LDW to load data from memory,
>1 bit of the data read out is incorrect.
>How can this happen?
>What kind of problem shoud it be?
>
>Thanks!
>
Reply by ●July 4, 20082008-07-04
Quite Bad, it seems my reply disappeared...
I'd like to reply again:
Hi,
The more general the question, the more general the answer. Try to
provide as many details as possible.
1. Is the problem in internal or external memory??
- internal memory.
2. Does the problem occur at 1 address, a group of addresses, or all addresses??
- Till now, only 1 address. But it's not the first time we load data from that address.
3. Do you see the problem in the CCS 'view memory' window??
- Yes, I can see.
4. Is the bit always high, always low, or some other pattern??
- the bit is original high, after LDW, it is always be changed to low.
Thanks!
By using the instruction LDW to load data from memory,
>1 bit of the data read out is incorrect.
>How can this happen?
>What kind of problem shoud it be?
>
>Thanks!
>
I'd like to reply again:
Hi,
The more general the question, the more general the answer. Try to
provide as many details as possible.
1. Is the problem in internal or external memory??
- internal memory.
2. Does the problem occur at 1 address, a group of addresses, or all addresses??
- Till now, only 1 address. But it's not the first time we load data from that address.
3. Do you see the problem in the CCS 'view memory' window??
- Yes, I can see.
4. Is the bit always high, always low, or some other pattern??
- the bit is original high, after LDW, it is always be changed to low.
Thanks!
By using the instruction LDW to load data from memory,
>1 bit of the data read out is incorrect.
>How can this happen?
>What kind of problem shoud it be?
>
>Thanks!
>
Reply by ●July 4, 20082008-07-04
iamxiaod,
Have you set up the interface with the RAM with the correct number of wait states?
If the voltages are not correct and/or the number of wait states is not correct, or the interface is
otherwise not properly initialized, then the timing margins may be slightly off and as the part
warms up, data bit errors will begin to show.
Of course, the specific bit in that specific chip instance may be bad.
Have you tried replacing the chip with another of the same kind?
R. Williams
---------- Original Message -----------
From: i...@163.com
To: c...
Sent: Thu, 03 Jul 2008 23:34:30 -0400
Subject: [c6x] Re: LDW instruction get incorrect data
> Quite Bad, it seems my reply disappeared...
> I'd like to reply again:
> Hi,
>
> The more general the question, the more general the answer. Try to
> provide as many details as possible.
> 1. Is the problem in internal or external memory??
> - internal memory.
> 2. Does the problem occur at 1 address, a group of addresses, or all addresses??
> - Till now, only 1 address. But it's not the first time we load data from that address.
> 3. Do you see the problem in the CCS 'view memory' window??
> - Yes, I can see.
> 4. Is the bit always high, always low, or some other pattern??
> - the bit is original high, after LDW, it is always be changed to low.
>
> Thanks!
>
> By using the instruction LDW to load data from memory,
> >1 bit of the data read out is incorrect.
> >How can this happen?
> >What kind of problem shoud it be?
> >
> >Thanks!
> >
>
> >
> >
------- End of Original Message -------
Have you set up the interface with the RAM with the correct number of wait states?
If the voltages are not correct and/or the number of wait states is not correct, or the interface is
otherwise not properly initialized, then the timing margins may be slightly off and as the part
warms up, data bit errors will begin to show.
Of course, the specific bit in that specific chip instance may be bad.
Have you tried replacing the chip with another of the same kind?
R. Williams
---------- Original Message -----------
From: i...@163.com
To: c...
Sent: Thu, 03 Jul 2008 23:34:30 -0400
Subject: [c6x] Re: LDW instruction get incorrect data
> Quite Bad, it seems my reply disappeared...
> I'd like to reply again:
> Hi,
>
> The more general the question, the more general the answer. Try to
> provide as many details as possible.
> 1. Is the problem in internal or external memory??
> - internal memory.
> 2. Does the problem occur at 1 address, a group of addresses, or all addresses??
> - Till now, only 1 address. But it's not the first time we load data from that address.
> 3. Do you see the problem in the CCS 'view memory' window??
> - Yes, I can see.
> 4. Is the bit always high, always low, or some other pattern??
> - the bit is original high, after LDW, it is always be changed to low.
>
> Thanks!
>
> By using the instruction LDW to load data from memory,
> >1 bit of the data read out is incorrect.
> >How can this happen?
> >What kind of problem shoud it be?
> >
> >Thanks!
> >
>
> >
> >
------- End of Original Message -------
Reply by ●July 4, 20082008-07-04
Xiao D-
> Quite Bad, it seems my reply disappeared...
> I'd like to reply again:
> Hi,
>
> The more general the question, the more general the answer. Try to
> provide as many details as possible.
> 1. Is the problem in internal or external memory??
> - internal memory.
> 2. Does the problem occur at 1 address, a group of addresses, or all addresses??
> - Till now, only 1 address. But it's not the first time we load data from that address.
> 3. Do you see the problem in the CCS 'view memory' window??
> - Yes, I can see.
Please clarify this comment. What do you "see"? Do you write a pattern and get back the same data but the problem
bit is always low? Always high? How many addresses do you write?
If you really have a bad bit problem, then it's highly unlikely to be just be one address. It should occur in a range
of addresses, and possibly all addresses. If this type of problem actually happens (I say actually, because such
occurrence is infrequent), then the problem is typically one of:
-R-pack on the board has one bad R,
short between Rs, one lead not
soldered
-one ball or pin on the SDRAM part
has a bad solder joint (or same
issue with ball on the DSP)
As Richard points out, it could also be a problem with EMIF register settings for the SDRAM CEn space. But, those
type of problem usually affect more than one bit.
It's very, very unlikely the SDRAM chip itself has a problem of "one bad bit in one address location". Over the
course of 100s of hardware projects, I have not seen this since 1992.
-Jeff
> 4. Is the bit always high, always low, or some other pattern??
> - the bit is original high, after LDW, it is always be changed to low.
>
> Thanks!
> By using the instruction LDW to load data from memory,
>>1 bit of the data read out is incorrect.
>>How can this happen?
>>What kind of problem shoud it be?
>>
>>Thanks!
> Quite Bad, it seems my reply disappeared...
> I'd like to reply again:
> Hi,
>
> The more general the question, the more general the answer. Try to
> provide as many details as possible.
> 1. Is the problem in internal or external memory??
> - internal memory.
> 2. Does the problem occur at 1 address, a group of addresses, or all addresses??
> - Till now, only 1 address. But it's not the first time we load data from that address.
> 3. Do you see the problem in the CCS 'view memory' window??
> - Yes, I can see.
Please clarify this comment. What do you "see"? Do you write a pattern and get back the same data but the problem
bit is always low? Always high? How many addresses do you write?
If you really have a bad bit problem, then it's highly unlikely to be just be one address. It should occur in a range
of addresses, and possibly all addresses. If this type of problem actually happens (I say actually, because such
occurrence is infrequent), then the problem is typically one of:
-R-pack on the board has one bad R,
short between Rs, one lead not
soldered
-one ball or pin on the SDRAM part
has a bad solder joint (or same
issue with ball on the DSP)
As Richard points out, it could also be a problem with EMIF register settings for the SDRAM CEn space. But, those
type of problem usually affect more than one bit.
It's very, very unlikely the SDRAM chip itself has a problem of "one bad bit in one address location". Over the
course of 100s of hardware projects, I have not seen this since 1992.
-Jeff
> 4. Is the bit always high, always low, or some other pattern??
> - the bit is original high, after LDW, it is always be changed to low.
>
> Thanks!
> By using the instruction LDW to load data from memory,
>>1 bit of the data read out is incorrect.
>>How can this happen?
>>What kind of problem shoud it be?
>>
>>Thanks!
Reply by ●July 4, 20082008-07-04
On Fri, Jul 4, 2008 at 1:32 PM, Jeff Brower wrote:
> Xiao D-
>
>> Quite Bad, it seems my reply disappeared...
>> I'd like to reply again:
>> Hi,
>>
>> The more general the question, the more general the answer. Try to
>> provide as many details as possible.
>> 1. Is the problem in internal or external memory??
>> - internal memory.
>> 2. Does the problem occur at 1 address, a group of addresses, or all
>> addresses??
>> - Till now, only 1 address. But it's not the first time we load data from
>> that address.
A. What is the address??
B. What is the 'write/old/good data' and the 'read/bad data'??
C. Is the code written in C or assembler??
>> 3. Do you see the problem in the CCS 'view memory' window??
>> - Yes, I can see.
>
> Please clarify this comment. What do you "see"? Do you write a pattern and
> get back the same data but the problem
> bit is always low? Always high? How many addresses do you write?
Along the same line as Jeff's question...
D. Looking at your answer to A and B above - Using CCS 'view memory',
If you write the 'good' data to the address, what shows on the
screen??
E. What does it show when you refresh the memory window??
>
> If you really have a bad bit problem, then it's highly unlikely to be just
> be one address. It should occur in a range
> of addresses, and possibly all addresses. If this type of problem actually
> happens (I say actually, because such
> occurrence is infrequent), then the problem is typically one of:
>
> -R-pack on the board has one bad R,
> short between Rs, one lead not
> soldered
>
> -one ball or pin on the SDRAM part
> has a bad solder joint (or same
> issue with ball on the DSP)
>
> As Richard points out, it could also be a problem with EMIF register
> settings for the SDRAM CEn space. But, those
> type of problem usually affect more than one bit.
>
> It's very, very unlikely the SDRAM chip itself has a problem of "one bad bit
> in one address location". Over the
> course of 100s of hardware projects, I have not seen this since 1992.
>
> -Jeff
>
>> 4. Is the bit always high, always low, or some other pattern??
>> - the bit is original high, after LDW, it is always be changed to low.
>>
>> Thanks!
>> By using the instruction LDW to load data from memory,
>>>1 bit of the data read out is incorrect.
>>>How can this happen?
>>>What kind of problem shoud it be?
Be patient. Keep in mind that you are only seeing the symptoms
and the problem is yet to be fully understood.
F. What happens if you perform 4 byte reads [add, add+1, add+2, add+3]??
G. What happens if you perform 2 short reads??
mikedunn
>>>
>>>Thanks!
--
www.dsprelated.com/blogs-1/nf/Mike_Dunn.php
> Xiao D-
>
>> Quite Bad, it seems my reply disappeared...
>> I'd like to reply again:
>> Hi,
>>
>> The more general the question, the more general the answer. Try to
>> provide as many details as possible.
>> 1. Is the problem in internal or external memory??
>> - internal memory.
>> 2. Does the problem occur at 1 address, a group of addresses, or all
>> addresses??
>> - Till now, only 1 address. But it's not the first time we load data from
>> that address.
A. What is the address??
B. What is the 'write/old/good data' and the 'read/bad data'??
C. Is the code written in C or assembler??
>> 3. Do you see the problem in the CCS 'view memory' window??
>> - Yes, I can see.
>
> Please clarify this comment. What do you "see"? Do you write a pattern and
> get back the same data but the problem
> bit is always low? Always high? How many addresses do you write?
Along the same line as Jeff's question...
D. Looking at your answer to A and B above - Using CCS 'view memory',
If you write the 'good' data to the address, what shows on the
screen??
E. What does it show when you refresh the memory window??
>
> If you really have a bad bit problem, then it's highly unlikely to be just
> be one address. It should occur in a range
> of addresses, and possibly all addresses. If this type of problem actually
> happens (I say actually, because such
> occurrence is infrequent), then the problem is typically one of:
>
> -R-pack on the board has one bad R,
> short between Rs, one lead not
> soldered
>
> -one ball or pin on the SDRAM part
> has a bad solder joint (or same
> issue with ball on the DSP)
>
> As Richard points out, it could also be a problem with EMIF register
> settings for the SDRAM CEn space. But, those
> type of problem usually affect more than one bit.
>
> It's very, very unlikely the SDRAM chip itself has a problem of "one bad bit
> in one address location". Over the
> course of 100s of hardware projects, I have not seen this since 1992.
>
> -Jeff
>
>> 4. Is the bit always high, always low, or some other pattern??
>> - the bit is original high, after LDW, it is always be changed to low.
>>
>> Thanks!
>> By using the instruction LDW to load data from memory,
>>>1 bit of the data read out is incorrect.
>>>How can this happen?
>>>What kind of problem shoud it be?
Be patient. Keep in mind that you are only seeing the symptoms
and the problem is yet to be fully understood.
F. What happens if you perform 4 byte reads [add, add+1, add+2, add+3]??
G. What happens if you perform 2 short reads??
mikedunn
>>>
>>>Thanks!
--
www.dsprelated.com/blogs-1/nf/Mike_Dunn.php
Reply by ●July 5, 20082008-07-05
Hi,
The problem actually only happened once in our experiment.
But it's sure that the data after LDW is wrong, because the one in memory is still right.
I just want to know if such kinds of problem is general or can only be seen very seldom?
>>Have you set up the interface with the RAM with the correct number of wait states?
- I'm not familiar with this. So what is the 'wait states'? Is it a parameter of EMIF register?
>> -R-pack on the board has one bad R,
>> short between Rs, one lead not
>> soldered
>>
>> -one ball or pin on the SDRAM part
>> has a bad solder joint (or same
>> issue with ball on the DSP)
- Yes, there maybe some kind of HW problem, but considered it just used for experiment, and did not happen now, so we'll keep this in mind if it will happen any time in the future.
>C. Is the code written in C or assembler??
- in C.
>F. What happens if you perform 4 byte reads [add, add+1, add+2, add+3]??
>G. What happens if you perform 2 short reads??
- Should this can only be done if writing assembler codes?
Thanks!
?
The problem actually only happened once in our experiment.
But it's sure that the data after LDW is wrong, because the one in memory is still right.
I just want to know if such kinds of problem is general or can only be seen very seldom?
>>Have you set up the interface with the RAM with the correct number of wait states?
- I'm not familiar with this. So what is the 'wait states'? Is it a parameter of EMIF register?
>> -R-pack on the board has one bad R,
>> short between Rs, one lead not
>> soldered
>>
>> -one ball or pin on the SDRAM part
>> has a bad solder joint (or same
>> issue with ball on the DSP)
- Yes, there maybe some kind of HW problem, but considered it just used for experiment, and did not happen now, so we'll keep this in mind if it will happen any time in the future.
>C. Is the code written in C or assembler??
- in C.
>F. What happens if you perform 4 byte reads [add, add+1, add+2, add+3]??
>G. What happens if you perform 2 short reads??
- Should this can only be done if writing assembler codes?
Thanks!
?
Reply by ●July 5, 20082008-07-05
Hi,
The problem actually only happened once in our experiment.
But it's sure that the data after LDW is wrong, because the one in memory is still right.
I actually want to know if such kinds of problem is general or can only be seen very seldom?
>>Have you set up the interface with the RAM with the correct number of wait states?
- I'm not familiar with this. So what is the 'wait states'? Is it a parameter of EMIF register?
>> -R-pack on the board has one bad R,
>> short between Rs, one lead not
>> soldered
>>
>> -one ball or pin on the SDRAM part
>> has a bad solder joint (or same
>> issue with ball on the DSP)
- Yes, there maybe some kind of HW problem, but considered it just used for experiment, and did not happen now, so we'll keep this in mind if it will happen any time in the future.
>C. Is the code written in C or assembler??
- in C.
>F. What happens if you perform 4 byte reads [add, add+1, add+2, add+3]??
>G. What happens if you perform 2 short reads??
- Should this can only be done if writing assembler codes?
Thanks!
>
The problem actually only happened once in our experiment.
But it's sure that the data after LDW is wrong, because the one in memory is still right.
I actually want to know if such kinds of problem is general or can only be seen very seldom?
>>Have you set up the interface with the RAM with the correct number of wait states?
- I'm not familiar with this. So what is the 'wait states'? Is it a parameter of EMIF register?
>> -R-pack on the board has one bad R,
>> short between Rs, one lead not
>> soldered
>>
>> -one ball or pin on the SDRAM part
>> has a bad solder joint (or same
>> issue with ball on the DSP)
- Yes, there maybe some kind of HW problem, but considered it just used for experiment, and did not happen now, so we'll keep this in mind if it will happen any time in the future.
>C. Is the code written in C or assembler??
- in C.
>F. What happens if you perform 4 byte reads [add, add+1, add+2, add+3]??
>G. What happens if you perform 2 short reads??
- Should this can only be done if writing assembler codes?
Thanks!
>
