New
TMS320C674x floating-point DSPs provide low power and high precision.
For the first time, designers will have the ability to bring
portability to audio, medical, industrial and other applications
requiring the precision, wide dynamic range and time-to-market benefits
of floating-point DSPs. Using three times less power than existing
floating-point DSPs, the C674x devices deliver 24-/32-bit accuracy and
are the industry's lowest power floating-point DSPs. Slated for
delivery in Q4 2008, the power consumption ranges from 8 mW in standby
mode to 385 mW total power.
href="http://focus.ti.com/docs/prod/folders/print/tms320c6747.html">Learn
more
Sorry for pushing TI Marketing at the group, but I just came across
this information, and am looking for opinions from past TI products.
Initially I really like the specs on this chip, because I'm currently
using a TMS320C6713B solution and could really use more processing
power. Also, the inclusion of features such as a real time clock, and
UART / USB / Ethernet directly in the chip is extremely appealing. They
mention 4th quarter availability, and project timelines are probably
going to mean that I can't depend on this chips availability.
Does past history of quarter references indicate just sometime within
the quarter?
I am primarily a software person, who's been programming on a single
DSP platform for the past couple of years. Are there any guidelines for
how much time it takes from getting a new chip to having a functional
board utilizing the chip?
Wim.
__._,_.___
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Note: If you do a simple "reply" with your email client, only the
author of this message will receive your answer. You need to do a
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group.
Looks to me like exactly the same processing power as the C6713. But lower
power.
I like the built in USB but I can't find if it is High speed or Full speed
or if the USB stack and Drivers are available.
Does anyone know?
Tom Kerekes
----- Original Message ----
From: William C Bonner
To: DSPgroup
Sent: Tuesday, September 9, 2008 9:29:43 AM
Subject: [c6x] Looking at new floating point DSP. (tms320c6747)
July 22, 2008
TI introduces the lowest power floating-point DSP
New TMS320C674x floating-point DSPs provide low power and high precision. For
the first time, designers will have the ability to bring portability to audio,
medical, industrial and other applications requiring the precision, wide dynamic
range and time-to-market benefits of floating-point DSPs. Using three times less
power than existing floating-point DSPs, the C674x devices deliver 24-/32-bit
accuracy and are the industry's lowest power floating-point DSPs. Slated
for delivery in Q4 2008, the power consumption ranges from 8 mW in standby mode
to 385 mW total power. Learn more
Sorry for pushing TI Marketing at the group, but I just came across this
information, and am looking for opinions from past TI products. Initially I
really like the specs on this chip, because I'm currently using a
TMS320C6713B solution and could really use more processing power. Also, the
inclusion of features such as a real time clock, and UART / USB / Ethernet
directly in the chip is extremely appealing. They mention 4th quarter
availability, and project timelines are probably going to mean that I can't
depend on this chips availability.
Does past history of quarter references indicate just sometime within the
quarter?
I am primarily a software person, who's been programming on a single DSP
platform for the past couple of years. Are there any guidelines for how much
time it takes from getting a new chip to having a functional board utilizing the
chip?
Wim.
Reply by William C Bonner●September 9, 20082008-09-09
Well, if MMACS (Million Multiply Accumulate Cycles per Second) are an
indication, this new chip running at the 200 MHz frequency gets 1600 of
them, and the 200MHz 6713 that I've been using only gets 400 of them, so
that's a 4x increase at the same external clock speed.
I was limited to running at the 200MHz speed on my old platform based on my
need for the extended environmental range of -40 to 105, and the new chip
claims to support -40 to 125 at both of it's speeds, so that's
another
benefit to me, allowing me to run at 300MHz and get 2400 MMACS, making it a
6x speed boost.
On Tue, Sep 9, 2008 at 2:06 PM, Tom Kerekes wrote:
> Looks to me like exactly the same processing power
as the C6713. But
> lower power.
>
> I like the built in USB but I can't find if it is High speed or Full
speed
> or if the USB stack and Drivers are available.
>
> Does anyone know?
>
> Tom Kerekes
> ----- Original Message ----
> From: William C Bonner
> To: DSPgroup
> Sent: Tuesday, September 9, 2008 9:29:43 AM
> Subject: [c6x] Looking at new floating point DSP. (tms320c6747)
>
> July 22, 2008 TI introduces the lowest power floating-point DSP
>
> New TMS320C674x floating-point DSPs provide low power and high precision.
> For the first time, designers will have the ability to bring portability to
> audio, medical, industrial and other applications requiring the precision,
> wide dynamic range and time-to-market benefits of floating-point DSPs.
Using
> three times less power than existing floating-point DSPs, the C674x devices
> deliver 24-/32-bit accuracy and are the industry's lowest power
> floating-point DSPs. Slated for delivery in Q4 2008, the power consumption
> ranges from 8 mW in standby mode to 385 mW total power. Learn
more Sorry for
pushing TI Marketing at the group, but I just came across this
> information, and am looking for opinions from past TI products. Initially I
> really like the specs on this chip, because I'm currently using a
> TMS320C6713B solution and could really use more processing power. Also, the
> inclusion of features such as a real time clock, and UART / USB / Ethernet
> directly in the chip is extremely appealing. They mention 4th quarter
> availability, and project timelines are probably going to mean that I
can't
> depend on this chips availability.
>
> Does past history of quarter references indicate just sometime within the
> quarter?
>
> I am primarily a software person, who's been programming on a single
DSP
> platform for the past couple of years. Are there any guidelines for how
much
> time it takes from getting a new chip to having a functional board
utilizing
> the chip?
>
> Wim.
>
>
>
Reply by Michael Dunn●September 9, 20082008-09-09
Wim and Tom,
On Tue, Sep 9, 2008 at 4:06 PM, Tom Kerekes wrote: > Looks to me like exactly the same processing power as
the C6713. But lower
> power.
After carefully reading the press release, one could *infer* that the
device is based on the c64+ architecture. This would provide support
for 16 bit 'compact' instructions and other c64+ 'goodies'
which will
lead to performance improvements - especially when running from DDR.
Also, the low power stats would indicate that there is headroom for a
higher power, higher performance version.
>
> I like the built in USB but I can't find if it is High speed or Full
speed
> or if the USB stack and Drivers are available.
>
> Does anyone know?
I would *expect* that it would be the same USB peripheral used by c64+
devices. >
> Tom Kerekes
> ----- Original Message ----
> From: William C Bonner
> To: DSPgroup
> Sent: Tuesday, September 9, 2008 9:29:43 AM
> Subject: [c6x] Looking at new floating point DSP. (tms320c6747)
>
> July 22, 2008
>
> TI introduces the lowest power floating-point DSP
>
> New TMS320C674x floating-point DSPs provide low power and high precision.
> For the first time, designers will have the ability to bring portability to
> audio, medical, industrial and other applications requiring the precision,
> wide dynamic range and time-to-market benefits of floating-point DSPs.
Using
> three times less power than existing floating-point DSPs, the C674x devices
> deliver 24-/32-bit accuracy and are the industry's lowest power
> floating-point DSPs. Slated for delivery in Q4 2008, the power consumption
> ranges from 8 mW in standby mode to 385 mW total power. Learn more
>
> Sorry for pushing TI Marketing at the group,
No need to apologize [unless you are selling the devices :-)
this group is for c6x devices.
> but I just came across this
> information, and am looking for opinions from past TI products. Initially I
> really like the specs on this chip, because I'm currently using a
> TMS320C6713B solution and could really use more processing power. Also, the
> inclusion of features such as a real time clock, and UART / USB / Ethernet
> directly in the chip is extremely appealing. They mention 4th quarter
> availability, and project timelines are probably going to mean that I
can't
> depend on this chips availability.
>
> Does past history of quarter references indicate just sometime within the
> quarter?
I would say that the results have been 'all over the place'.
Some things to think about:
1. There is not a datasheet at ti.com. [A preliminary version is
probably available under NDA].
2. If you contact TI [if you use a disti, they will do it for you],
you can get additional info and some 'inside scoop' on the device
schedule. You or your disti can get 'a place in line' for silicon
delivery.
3. There will be a bunch of low level porting work.
4. If TI has a pin compatible fixed point chip available today,
hardware could be designed and low level porting could commence as
soon as a board was available. If there is an EVM available now,
porting could start now.
5. If you are an early user, and you have an 'interesting
application', and TI is anxious for new device designs, and the moon
is right... you could get some 'extra support' from TI.
6. There are a bunch of things that could go wrong - see Murphy for details
:-) >
> I am primarily a software person, who's been programming on a single
DSP
> platform for the past couple of years. Are there any guidelines for how
much
> time it takes from getting a new chip to having a functional board
utilizing
> the chip?
Not at all. It depends on the hardware team and the device/device
documentation [that's why I suggested number 4 above - it minimizes a
lot of risk].
mikedunn >
> Wim.
--
www.dsprelated.com/blogs-1/nf/Mike_Dunn.php
Reply by Michael Dunn●September 9, 20082008-09-09
Wim,
On Tue, Sep 9, 2008 at 5:21 PM, William C Bonner wrote: > Well, if MMACS (Million Multiply Accumulate Cycles
per Second) are an
> indication, this new chip running at the 200 MHz frequency gets 1600 of
> them, and the 200MHz 6713 that I've been using only gets 400 of them,
so
> that's a 4x increase at the same external clock speed.
Not exactly.
Your 200Mhz 6713 gets 1600 MIPS/1200 MFLOPS [advertised - see datasheet].
2 fix.pt. ALUs, 4 fix/flt pt. ALUs, 2 multipliers all in parallel [if
you can keep them fed :-)
mikedunn >
> I was limited to running at the 200MHz speed on my old platform based on my
> need for the extended environmental range of -40 to 105, and the new chip
> claims to support -40 to 125 at both of it's speeds, so that's
another
> benefit to me, allowing me to run at 300MHz and get 2400 MMACS, making it a
> 6x speed boost.
>
> On Tue, Sep 9, 2008 at 2:06 PM, Tom Kerekes wrote:
>>
>> Looks to me like exactly the same processing power as the C6713. But
>> lower power.
>>
>> I like the built in USB but I can't find if it is High speed or Full
speed
>> or if the USB stack and Drivers are available.
>>
>> Does anyone know?
>>
>> Tom Kerekes
>> ----- Original Message ----
>> From: William C Bonner
>> To: DSPgroup
>> Sent: Tuesday, September 9, 2008 9:29:43 AM
>> Subject: [c6x] Looking at new floating point DSP. (tms320c6747)
>>
>> July 22, 2008
>>
>> TI introduces the lowest power floating-point DSP
>>
>> New TMS320C674x floating-point DSPs provide low power and high precision.
>> For the first time, designers will have the ability to bring portability
to
>> audio, medical, industrial and other applications requiring the precision,
>> wide dynamic range and time-to-market benefits of floating-point DSPs.
Using
>> three times less power than existing floating-point DSPs, the C674x
devices
>> deliver 24-/32-bit accuracy and are the industry's lowest power
>> floating-point DSPs. Slated for delivery in Q4 2008, the power consumption
>> ranges from 8 mW in standby mode to 385 mW total power. Learn more
>>
>> Sorry for pushing TI Marketing at the group, but I just came across this
>> information, and am looking for opinions from past TI products. Initially
I
>> really like the specs on this chip, because I'm currently using a
>> TMS320C6713B solution and could really use more processing power. Also,
the
>> inclusion of features such as a real time clock, and UART / USB / Ethernet
>> directly in the chip is extremely appealing. They mention 4th quarter
>> availability, and project timelines are probably going to mean that I
can't
>> depend on this chips availability.
>>
>> Does past history of quarter references indicate just sometime within the
>> quarter?
>>
>> I am primarily a software person, who's been programming on a single
DSP
>> platform for the past couple of years. Are there any guidelines for how
much
>> time it takes from getting a new chip to having a functional board
utilizing
>> the chip?
>>
>> Wim.
--
www.dsprelated.com/blogs-1/nf/Mike_Dunn.php
Reply by William C Bonner●September 9, 20082008-09-09
Ok, So I went and looked at the datasheet for the
TMS320C6713Band
it reads 1600/1200 MIPS/MFLOPS for the speed I'm running, and the
product bulletin for the
TMS320C674xreads
"up to 1800 MFLOPS" at low power and 2400 MFLOPS at 300MHz.
Thanks for correcting where I was looking. I had been looking at the tables
on this page http://focus.ti.com/docs/prod/folders/print/tms320c6713b.htmland
this page http://focus.ti.com/docs/prod/folders/print/tms320c6745.html and comparing
what I could find that matched. That was Peak MMACS. What are MMACS used for
in comparison purposes? (FLOPS I completely understand, and MIPS don't
make
sense with scaled architectures. I'm working with lots of floating
point
operations, so am currently dependent on the floating point procesors)
Wim.
On Tue, Sep 9, 2008 at 4:00 PM, Michael Dunn wrote:
> Wim,
>
> On Tue, Sep 9, 2008 at 5:21 PM, William C Bonner
> wrote:
> > Well, if MMACS (Million Multiply Accumulate Cycles per Second) are an
> > indication, this new chip running at the 200 MHz frequency gets 1600 of
> > them, and the 200MHz 6713 that I've been using only gets 400 of them,
so
> > that's a 4x increase at the same external clock speed.
>
>
> Not exactly.
> Your 200Mhz 6713 gets 1600 MIPS/1200 MFLOPS [advertised - see datasheet].
>
> 2 fix.pt. ALUs, 4 fix/flt pt. ALUs, 2 multipliers all in parallel [if
> you can keep them fed :-)
>
> mikedunn
> >
> > I was limited to running at the 200MHz speed on my old platform based on
> my
> > need for the extended environmental range of -40 to 105, and the new chip
> > claims to support -40 to 125 at both of it's speeds, so that's
another
> > benefit to me, allowing me to run at 300MHz and get 2400 MMACS, making it
> a
> > 6x speed boost.
> >
Reply by Michael Dunn●September 10, 20082008-09-10
Wim,
On Tue, Sep 9, 2008 at 7:10 PM, William C Bonner wrote: > Ok, So I went and looked at the datasheet for the
TMS320C6713B and it reads
> 1600/1200 MIPS/MFLOPS for the speed I'm running, and the product
bulletin
> for the TMS320C674x reads "up to 1800 MFLOPS" at low power and 2400 MFLOPS
> at 300MHz.
The computation speeds look identical for the same clock speed. The
real benefits will show up in other places.
MMACs - Millions of Multiply ACumulates per Second
I have only seen these in DSPs. Since many algos use multiply - add
loops and early DSPs required separate cycles for each, companies
could show performance advantages if there was no additional time
required for the adds [accumulates].
The bottom line is still how well your code performs. If you have
some time critical loops [don't we all :-) ], you can probably get a
simulator for the c674x for CCS 3.3 [Historically TI has had one
available at announcement]. If you are a registered CCS 3.3 user, you
can go to the CCS update site and see if it is listed [it would be
something like 'c674x CSP'].
My personal opion on simulators [in all fairness I am not much of a
simulator user]:
1. Don't run apps on simulators, just algorithms.
2. Rely on them for 'loop cycles', not total system performance.
3. External memory timings don't seem to correlate so good.
4. Run apples-to-apples tests. Run test code on the 6713 sim and the
674x sim. If the algo is 15% faster on the sim it will execute 15%
faster on the hardware [with the same memory environment].
mikedunn > (FLOPS I completely understand, and
> MIPS don't make sense with scaled architectures. I'm working with
lots of
> floating point operations, so am currently dependent on the floating point
> procesors)
>
> Wim.
>
> On Tue, Sep 9, 2008 at 4:00 PM, Michael Dunn
> wrote:
>>
>> Wim,
>>
>> On Tue, Sep 9, 2008 at 5:21 PM, William C Bonner
>> wrote:
>> > Well, if MMACS (Million Multiply Accumulate Cycles per Second) are an
>> > indication, this new chip running at the 200 MHz frequency gets 1600 of
>> > them, and the 200MHz 6713 that I've been using only gets 400 of them,
so
>> > that's a 4x increase at the same external clock speed.
>>
>>
>> Not exactly.
>> Your 200Mhz 6713 gets 1600 MIPS/1200 MFLOPS [advertised - see datasheet].
>>
>> 2 fix.pt. ALUs, 4 fix/flt pt. ALUs, 2 multipliers all in parallel [if
>> you can keep them fed :-)
>>
>> mikedunn
>> >
>> > I was limited to running at the 200MHz speed on my old platform based on
>> > my
>> > need for the extended environmental range of -40 to 105, and the new
>> > chip
>> > claims to support -40 to 125 at both of it's speeds, so that's
another
>> > benefit to me, allowing me to run at 300MHz and get 2400 MMACS, making
>> > it a
>> > 6x speed boost.
>> >
>>
--
www.dsprelated.com/blogs-1/nf/Mike_Dunn.php
Reply by Jeff Brower●September 10, 20082008-09-10
Mike-
>
> The computation speeds look identical for the same clock speed. The
> real benefits will show up in other places.
Hmm... did you guys decide that the C6747 does have 64x+ type core? Or does
not; i.e. is similar to C6713?
-Jeff
>> Thanks for correcting where I was looking. I had
been looking at the tables
>> on this page http://focus.ti.com/docs/prod/folders/print/tms320c6713b.html
>> and this page http://focus.ti.com/docs/prod/folders/print/tms320c6745.html
>> and comparing what I could find that matched. That was Peak MMACS. What
are
>> MMACS used for in comparison purposes?
>
> MMACs - Millions of Multiply ACumulates per Second
> I have only seen these in DSPs. Since many algos use multiply - add
> loops and early DSPs required separate cycles for each, companies
> could show performance advantages if there was no additional time
> required for the adds [accumulates].
>
> The bottom line is still how well your code performs. If you have
> some time critical loops [don't we all :-) ], you can probably get a
> simulator for the c674x for CCS 3.3 [Historically TI has had one
> available at announcement]. If you are a registered CCS 3.3 user, you
> can go to the CCS update site and see if it is listed [it would be
> something like 'c674x CSP'].
>
> My personal opion on simulators [in all fairness I am not much of a
> simulator user]:
> 1. Don't run apps on simulators, just algorithms.
> 2. Rely on them for 'loop cycles', not total system performance.
> 3. External memory timings don't seem to correlate so good.
> 4. Run apples-to-apples tests. Run test code on the 6713 sim and the
> 674x sim. If the algo is 15% faster on the sim it will execute 15%
> faster on the hardware [with the same memory environment].
>
> mikedunn
>> (FLOPS I completely understand, and
>> MIPS don't make sense with scaled architectures. I'm working with
lots of
>> floating point operations, so am currently dependent on the floating point
>> procesors)
>>
>> Wim.
>>
>> On Tue, Sep 9, 2008 at 4:00 PM, Michael Dunn
>> wrote:
>>>
>>> Wim,
>>>
>>> On Tue, Sep 9, 2008 at 5:21 PM, William C Bonner
>>> wrote:
>>> > Well, if MMACS (Million Multiply Accumulate Cycles per Second) are an
>>> > indication, this new chip running at the 200 MHz frequency gets 1600 of
>>> > them, and the 200MHz 6713 that I've been using only gets 400 of them,
so
>>> > that's a 4x increase at the same external clock speed.
>>>
>>>
>>> Not exactly.
>>> Your 200Mhz 6713 gets 1600 MIPS/1200 MFLOPS [advertised - see datasheet].
>>>
>>> 2 fix.pt. ALUs, 4 fix/flt pt. ALUs, 2 multipliers all in parallel [if
>>> you can keep them fed :-)
>>>
>>> mikedunn
>>> >
>>> > I was limited to running at the 200MHz speed on my old platform based
on
>>> > my
>>> > need for the extended environmental range of -40 to 105, and the new
>>> > chip
>>> > claims to support -40 to 125 at both of it's speeds, so that's
another
>>> > benefit to me, allowing me to run at 300MHz and get 2400 MMACS, making
>>> > it a
>>> > 6x speed boost.
Reply by Michael Dunn●September 10, 20082008-09-10
My 2 cents,
The features below tell me that it is a c64+ with floating point.
Instruction Packing Reduces Code Size
Hardware Support for Modulo Loop
Protected Mode Operation
Comprehensive System-Wide Security Operation
mikedunn
On Wed, Sep 10, 2008 at 10:57 AM, Jeff Brower wrote: > Mike-
>
>>
>> The computation speeds look identical for the same clock speed. The
>> real benefits will show up in other places.
>
> Hmm... did you guys decide that the C6747 does have 64x+ type core? Or does
not; i.e. is similar to C6713?
>
> -Jeff
>
>>> Thanks for correcting where I was looking. I had been looking at the
tables
>>> on this page
http://focus.ti.com/docs/prod/folders/print/tms320c6713b.html
>>> and this page
http://focus.ti.com/docs/prod/folders/print/tms320c6745.html
>>> and comparing what I could find that matched. That was Peak MMACS. What
are
>>> MMACS used for in comparison purposes?
>>
>> MMACs - Millions of Multiply ACumulates per Second
>> I have only seen these in DSPs. Since many algos use multiply - add
>> loops and early DSPs required separate cycles for each, companies
>> could show performance advantages if there was no additional time
>> required for the adds [accumulates].
>>
>> The bottom line is still how well your code performs. If you have
>> some time critical loops [don't we all :-) ], you can probably get a
>> simulator for the c674x for CCS 3.3 [Historically TI has had one
>> available at announcement]. If you are a registered CCS 3.3 user, you
>> can go to the CCS update site and see if it is listed [it would be
>> something like 'c674x CSP'].
>>
>> My personal opion on simulators [in all fairness I am not much of a
>> simulator user]:
>> 1. Don't run apps on simulators, just algorithms.
>> 2. Rely on them for 'loop cycles', not total system performance.
>> 3. External memory timings don't seem to correlate so good.
>> 4. Run apples-to-apples tests. Run test code on the 6713 sim and the
>> 674x sim. If the algo is 15% faster on the sim it will execute 15%
>> faster on the hardware [with the same memory environment].
>>
>> mikedunn
>>> (FLOPS I completely understand, and
>>> MIPS don't make sense with scaled architectures. I'm working with
lots of
>>> floating point operations, so am currently dependent on the floating
point
>>> procesors)
>>>
>>> Wim.
>>>
>>> On Tue, Sep 9, 2008 at 4:00 PM, Michael Dunn
>>> wrote:
>>>>
>>>> Wim,
>>>>
>>>> On Tue, Sep 9, 2008 at 5:21 PM, William C Bonner
>>>> wrote:
>>>> > Well, if MMACS (Million Multiply Accumulate Cycles per Second) are an
>>>> > indication, this new chip running at the 200 MHz frequency gets 1600
of
>>>> > them, and the 200MHz 6713 that I've been using only gets 400 of
them, so
>>>> > that's a 4x increase at the same external clock speed.
>>>>
>>>>
>>>> Not exactly.
>>>> Your 200Mhz 6713 gets 1600 MIPS/1200 MFLOPS [advertised - see
datasheet].
>>>>
>>>> 2 fix.pt. ALUs, 4 fix/flt pt. ALUs, 2 multipliers all in parallel [if
>>>> you can keep them fed :-)
>>>>
>>>> mikedunn
>>>> >
>>>> > I was limited to running at the 200MHz speed on my old platform based
on
>>>> > my
>>>> > need for the extended environmental range of -40 to 105, and the new
>>>> > chip
>>>> > claims to support -40 to 125 at both of it's speeds, so that's
another
>>>> > benefit to me, allowing me to run at 300MHz and get 2400 MMACS, making
>>>> > it a
>>>> > 6x speed boost.
--
www.dsprelated.com/blogs-1/nf/Mike_Dunn.php
Reply by Jeff Brower●September 10, 20082008-09-10
Mike-
> My 2 cents,
>
> The features below tell me that it is a c64+ with floating point.
> Instruction Packing Reduces Code Size
> Hardware Support for Modulo Loop
> Protected Mode Operation
> Comprehensive System-Wide Security Operation
Instruction packing is a tip-off, for sure. But it's still not clear to
me, because
otherwise there should be an obvious 2x increase in performance. Maybe the
situation is that fixed-point operations use the Joule core technology, but
floating-point doesn't?
-Jeff
> On Wed, Sep 10, 2008 at 10:57 AM, Jeff Brower
wrote:
> > Mike-
> >
> >>
> >> The computation speeds look identical for the same clock speed. The
> >> real benefits will show up in other places.
> >
> > Hmm... did you guys decide that the C6747 does have 64x+ type core? Or does
not; i.e. is similar to C6713?
> >
> > -Jeff
> >
> >>> Thanks for correcting where I was looking. I had been looking at the
tables
> >>> on this page
http://focus.ti.com/docs/prod/folders/print/tms320c6713b.html
> >>> and this page
http://focus.ti.com/docs/prod/folders/print/tms320c6745.html
> >>> and comparing what I could find that matched. That was Peak MMACS. What
are
> >>> MMACS used for in comparison purposes?
> >>
> >> MMACs - Millions of Multiply ACumulates per Second
> >> I have only seen these in DSPs. Since many algos use multiply - add
> >> loops and early DSPs required separate cycles for each, companies
> >> could show performance advantages if there was no additional time
> >> required for the adds [accumulates].
> >>
> >> The bottom line is still how well your code performs. If you have
> >> some time critical loops [don't we all :-) ], you can probably get
a
> >> simulator for the c674x for CCS 3.3 [Historically TI has had one
> >> available at announcement]. If you are a registered CCS 3.3 user, you
> >> can go to the CCS update site and see if it is listed [it would be
> >> something like 'c674x CSP'].
> >>
> >> My personal opion on simulators [in all fairness I am not much of a
> >> simulator user]:
> >> 1. Don't run apps on simulators, just algorithms.
> >> 2. Rely on them for 'loop cycles', not total system
performance.
> >> 3. External memory timings don't seem to correlate so good.
> >> 4. Run apples-to-apples tests. Run test code on the 6713 sim and the
> >> 674x sim. If the algo is 15% faster on the sim it will execute 15%
> >> faster on the hardware [with the same memory environment].
> >>
> >> mikedunn
> >>> (FLOPS I completely understand, and
> >>> MIPS don't make sense with scaled architectures. I'm working
with lots of
> >>> floating point operations, so am currently dependent on the floating
point
> >>> procesors)
> >>>
> >>> Wim.
> >>>
> >>> On Tue, Sep 9, 2008 at 4:00 PM, Michael Dunn
> >>> wrote:
> >>>>
> >>>> Wim,
> >>>>
> >>>> On Tue, Sep 9, 2008 at 5:21 PM, William C Bonner
> >>>> wrote:
> >>>> > Well, if MMACS (Million Multiply Accumulate Cycles per Second) are
an
> >>>> > indication, this new chip running at the 200 MHz frequency gets 1600
of
> >>>> > them, and the 200MHz 6713 that I've been using only gets 400 of
them, so
> >>>> > that's a 4x increase at the same external clock speed.
> >>>>
> >>>>
> >>>> Not exactly.
> >>>> Your 200Mhz 6713 gets 1600 MIPS/1200 MFLOPS [advertised - see
datasheet].
> >>>>
> >>>> 2 fix.pt. ALUs, 4 fix/flt pt. ALUs, 2 multipliers all in parallel [if
> >>>> you can keep them fed :-)
> >>>>
> >>>> mikedunn
> >>>> >
> >>>> > I was limited to running at the 200MHz speed on my old platform based
on
> >>>> > my
> >>>> > need for the extended environmental range of -40 to 105, and the new
> >>>> > chip
> >>>> > claims to support -40 to 125 at both of it's speeds, so
that's another
> >>>> > benefit to me, allowing me to run at 300MHz and get 2400 MMACS,
making
> >>>> > it a
> >>>> > 6x speed boost.
> >
> > --
> www.dsprelated.com/blogs-1/nf/Mike_Dunn.php
