Hi all,
I am a fairly new embedded programmer and this is my first post on this forum. I
am working with a 6713 DSP and in my current project I am reading data from some
FIFO's connected to the EMIF bus. My problem is the performance of the EMIF
I have measured the time it takes to read from the EMIF and i have confirmed
these findings with the simulator.
I'm excecuting the folowing code:
x++; // 10 clocks - 0.033 us
read1 = (int*) 0x90300004; // 3 clocks - 0.010 us
read2 = (int*) 0x90300008; // 3 clocks - 0.010 us
tmpRead1 = *read1; // 177 clocks - 0.590 us
tmpRead2 = *read2; // 176 clocks - 0.586 us
I've commented the measured clocktimes according to the simulator. 177
clocks for 1 read seems a bit much. Am I overlooking something? How can i
acquire a higher transfer speed?
With kind regards,
Dominic Stuart
_____________________________________
Slow EMIF transfer
Started by ●June 23, 2009
Reply by ●June 23, 20092009-06-23
Dominic-
> I am a fairly new embedded programmer and this is my first post on this
> forum. I am working with a 6713 DSP and in my current project I am reading
> data from some FIFO's connected to the EMIF bus. My problem is the
> performance of the EMIF I have measured the time it takes to read from the
> EMIF and i have confirmed these findings with the simulator.
>
> I'm excecuting the folowing code:
>
> x++; // 10 clocks - 0.033 us
> read1 = (int*) 0x90300004; // 3 clocks - 0.010 us
> read2 = (int*) 0x90300008; // 3 clocks - 0.010 us
> tmpRead1 = *read1; // 177 clocks - 0.590 us
> tmpRead2 = *read2; // 176 clocks - 0.586 us
>
> I've commented the measured clocktimes according to the simulator.
> 177 clocks for 1 read seems a bit much. Am I overlooking something? How
> can i acquire a higher transfer speed?
I assume your design, when it takes shape, will treat the FIFO interface as async,
like an SRAM. What are your EMIF register settings for the CEn space containing the
FIFO? Have you set setup and hold times to match the FIFO data sheet? Will you be
connecting ARDY to a pin on the FIFO, and if so are you able to simulate that?
-Jeff
_____________________________________
> I am a fairly new embedded programmer and this is my first post on this
> forum. I am working with a 6713 DSP and in my current project I am reading
> data from some FIFO's connected to the EMIF bus. My problem is the
> performance of the EMIF I have measured the time it takes to read from the
> EMIF and i have confirmed these findings with the simulator.
>
> I'm excecuting the folowing code:
>
> x++; // 10 clocks - 0.033 us
> read1 = (int*) 0x90300004; // 3 clocks - 0.010 us
> read2 = (int*) 0x90300008; // 3 clocks - 0.010 us
> tmpRead1 = *read1; // 177 clocks - 0.590 us
> tmpRead2 = *read2; // 176 clocks - 0.586 us
>
> I've commented the measured clocktimes according to the simulator.
> 177 clocks for 1 read seems a bit much. Am I overlooking something? How
> can i acquire a higher transfer speed?
I assume your design, when it takes shape, will treat the FIFO interface as async,
like an SRAM. What are your EMIF register settings for the CEn space containing the
FIFO? Have you set setup and hold times to match the FIFO data sheet? Will you be
connecting ARDY to a pin on the FIFO, and if so are you able to simulate that?
-Jeff
_____________________________________
Reply by ●June 23, 20092009-06-23
Dominic-
> thank you for your response, the design actualy is already implemented,
> I designed the hardware for the system and my ex-collegue has designed
> the software.
Ok... in that case I would avoid using the simulator. The only way to really know
what's going on with hardware is to measure it in action. How are you measuring
clock cycles? Dig scope or LA connected to FIFO signals?
> I am currently modifying and adding functionality to the
> software. Where can I find these EMIF register settings or can you
> point me to a document where I can read up on this interface?
Maybe these would help...
C6x EMIF Reference Guide:
http://focus.ti.com/lit/ug/spru266e/spru266e.pdf
TMS320C6000 EMIF to External FIFO Interface App Note:
http://focus.ti.com/lit/an/spra543/spra543.pdf
-Jeff
PS. Please post to the group, not to me. Also please don't cut text from previous
posts in the thread, I had to put your text back. I have fun to try to help and
answer questions, but not if I have to spend time formatting.
> > > I am a fairly new embedded programmer and this is my first post on this
> > > forum. I am working with a 6713 DSP and in my current project I am reading
> > > data from some FIFO's connected to the EMIF bus. My problem is the
> > > performance of the EMIF I have measured the time it takes to read from the
> > > EMIF and i have confirmed these findings with the simulator.
> > >
> > > I'm excecuting the folowing code:
> > >
> > > x++; // 10 clocks - 0.033 us
> > > read1 = (int*) 0x90300004; // 3 clocks - 0.010 us
> > > read2 = (int*) 0x90300008; // 3 clocks - 0.010 us
> > > tmpRead1 = *read1; // 177 clocks - 0.590 us
> > > tmpRead2 = *read2; // 176 clocks - 0.586 us
> > >
> > > I've commented the measured clocktimes according to the simulator.
> > > 177 clocks for 1 read seems a bit much. Am I overlooking something? How
> > > can i acquire a higher transfer speed?
> >
> > I assume your design, when it takes shape, will treat the FIFO interface as async,
> > like an SRAM. What are your EMIF register settings for the CEn space containing the
> > FIFO? Have you set setup and hold times to match the FIFO data sheet? Will you be
> > connecting ARDY to a pin on the FIFO, and if so are you able to simulate that?
> >
> > -Jeff
_____________________________________
> thank you for your response, the design actualy is already implemented,
> I designed the hardware for the system and my ex-collegue has designed
> the software.
Ok... in that case I would avoid using the simulator. The only way to really know
what's going on with hardware is to measure it in action. How are you measuring
clock cycles? Dig scope or LA connected to FIFO signals?
> I am currently modifying and adding functionality to the
> software. Where can I find these EMIF register settings or can you
> point me to a document where I can read up on this interface?
Maybe these would help...
C6x EMIF Reference Guide:
http://focus.ti.com/lit/ug/spru266e/spru266e.pdf
TMS320C6000 EMIF to External FIFO Interface App Note:
http://focus.ti.com/lit/an/spra543/spra543.pdf
-Jeff
PS. Please post to the group, not to me. Also please don't cut text from previous
posts in the thread, I had to put your text back. I have fun to try to help and
answer questions, but not if I have to spend time formatting.
> > > I am a fairly new embedded programmer and this is my first post on this
> > > forum. I am working with a 6713 DSP and in my current project I am reading
> > > data from some FIFO's connected to the EMIF bus. My problem is the
> > > performance of the EMIF I have measured the time it takes to read from the
> > > EMIF and i have confirmed these findings with the simulator.
> > >
> > > I'm excecuting the folowing code:
> > >
> > > x++; // 10 clocks - 0.033 us
> > > read1 = (int*) 0x90300004; // 3 clocks - 0.010 us
> > > read2 = (int*) 0x90300008; // 3 clocks - 0.010 us
> > > tmpRead1 = *read1; // 177 clocks - 0.590 us
> > > tmpRead2 = *read2; // 176 clocks - 0.586 us
> > >
> > > I've commented the measured clocktimes according to the simulator.
> > > 177 clocks for 1 read seems a bit much. Am I overlooking something? How
> > > can i acquire a higher transfer speed?
> >
> > I assume your design, when it takes shape, will treat the FIFO interface as async,
> > like an SRAM. What are your EMIF register settings for the CEn space containing the
> > FIFO? Have you set setup and hold times to match the FIFO data sheet? Will you be
> > connecting ARDY to a pin on the FIFO, and if so are you able to simulate that?
> >
> > -Jeff
_____________________________________
Reply by ●June 23, 20092009-06-23
Dominic-
Did you see my PS? If you just missed that and you can re-post then I'm Ok to
continue to help.
Otherwise I hope someone else might help you...
-Jeff
"d.stuartnl" wrote:
>
> I started out measuring the performance of the system with a hardware timer and printing the result to the RS232 channel. I found out that i could only read 30 bytes in 67.7 microseconds. This means I can read 1 byte every 2.256 us. I know the FIFO is filled with a dataclock with 4MHz so I'm sure there are bytes available every 0.25 us. When i discovered this problem I decided to run the code in the Simulator of CCS. I found that the timing the simulator suggests is very accurate if I compare it to the measured values I got from the Hardware timer.
>
> It all boils down to why is the read from the EMIF so slow? (in the simulator and in real world) I will read the EMIF reference guide you provided in your last response and hope to find some answers.
>
> With kind regards,
>
> Dominic Stuart
>
> --- In c..., Jeff Brower wrote:
> >
> > Dominic-
> >
> > > thank you for your response, the design actualy is already implemented,
> > > I designed the hardware for the system and my ex-collegue has designed
> > > the software.
> >
> > Ok... in that case I would avoid using the simulator. The only way to really know
> > what's going on with hardware is to measure it in action. How are you measuring
> > clock cycles? Dig scope or LA connected to FIFO signals?
> >
> > > I am currently modifying and adding functionality to the
> > > software. Where can I find these EMIF register settings or can you
> > > point me to a document where I can read up on this interface?
> >
> > Maybe these would help...
> >
> > C6x EMIF Reference Guide:
> >
> > http://focus.ti.com/lit/ug/spru266e/spru266e.pdf
> >
> > TMS320C6000 EMIF to External FIFO Interface App Note:
> >
> > http://focus.ti.com/lit/an/spra543/spra543.pdf
> >
> > -Jeff
> >
> > PS. Please post to the group, not to me. Also please don't cut text from previous
> > posts in the thread, I had to put your text back. I have fun to try to help and
> > answer questions, but not if I have to spend time formatting.
> >
> >
> > > > > I am a fairly new embedded programmer and this is my first post on this
> > > > > forum. I am working with a 6713 DSP and in my current project I am reading
> > > > > data from some FIFO's connected to the EMIF bus. My problem is the
> > > > > performance of the EMIF I have measured the time it takes to read from the
> > > > > EMIF and i have confirmed these findings with the simulator.
> > > > >
> > > > > I'm excecuting the folowing code:
> > > > >
> > > > > x++; // 10 clocks - 0.033 us
> > > > > read1 = (int*) 0x90300004; // 3 clocks - 0.010 us
> > > > > read2 = (int*) 0x90300008; // 3 clocks - 0.010 us
> > > > > tmpRead1 = *read1; // 177 clocks - 0.590 us
> > > > > tmpRead2 = *read2; // 176 clocks - 0.586 us
> > > > >
> > > > > I've commented the measured clocktimes according to the simulator.
> > > > > 177 clocks for 1 read seems a bit much. Am I overlooking something? How
> > > > > can i acquire a higher transfer speed?
> > > >
> > > > I assume your design, when it takes shape, will treat the FIFO interface as async,
> > > > like an SRAM. What are your EMIF register settings for the CEn space containing the
> > > > FIFO? Have you set setup and hold times to match the FIFO data sheet? Will you be
> > > > connecting ARDY to a pin on the FIFO, and if so are you able to simulate that?
> > > >
> > > > -Jeff
> >
_____________________________________
Did you see my PS? If you just missed that and you can re-post then I'm Ok to
continue to help.
Otherwise I hope someone else might help you...
-Jeff
"d.stuartnl" wrote:
>
> I started out measuring the performance of the system with a hardware timer and printing the result to the RS232 channel. I found out that i could only read 30 bytes in 67.7 microseconds. This means I can read 1 byte every 2.256 us. I know the FIFO is filled with a dataclock with 4MHz so I'm sure there are bytes available every 0.25 us. When i discovered this problem I decided to run the code in the Simulator of CCS. I found that the timing the simulator suggests is very accurate if I compare it to the measured values I got from the Hardware timer.
>
> It all boils down to why is the read from the EMIF so slow? (in the simulator and in real world) I will read the EMIF reference guide you provided in your last response and hope to find some answers.
>
> With kind regards,
>
> Dominic Stuart
>
> --- In c..., Jeff Brower wrote:
> >
> > Dominic-
> >
> > > thank you for your response, the design actualy is already implemented,
> > > I designed the hardware for the system and my ex-collegue has designed
> > > the software.
> >
> > Ok... in that case I would avoid using the simulator. The only way to really know
> > what's going on with hardware is to measure it in action. How are you measuring
> > clock cycles? Dig scope or LA connected to FIFO signals?
> >
> > > I am currently modifying and adding functionality to the
> > > software. Where can I find these EMIF register settings or can you
> > > point me to a document where I can read up on this interface?
> >
> > Maybe these would help...
> >
> > C6x EMIF Reference Guide:
> >
> > http://focus.ti.com/lit/ug/spru266e/spru266e.pdf
> >
> > TMS320C6000 EMIF to External FIFO Interface App Note:
> >
> > http://focus.ti.com/lit/an/spra543/spra543.pdf
> >
> > -Jeff
> >
> > PS. Please post to the group, not to me. Also please don't cut text from previous
> > posts in the thread, I had to put your text back. I have fun to try to help and
> > answer questions, but not if I have to spend time formatting.
> >
> >
> > > > > I am a fairly new embedded programmer and this is my first post on this
> > > > > forum. I am working with a 6713 DSP and in my current project I am reading
> > > > > data from some FIFO's connected to the EMIF bus. My problem is the
> > > > > performance of the EMIF I have measured the time it takes to read from the
> > > > > EMIF and i have confirmed these findings with the simulator.
> > > > >
> > > > > I'm excecuting the folowing code:
> > > > >
> > > > > x++; // 10 clocks - 0.033 us
> > > > > read1 = (int*) 0x90300004; // 3 clocks - 0.010 us
> > > > > read2 = (int*) 0x90300008; // 3 clocks - 0.010 us
> > > > > tmpRead1 = *read1; // 177 clocks - 0.590 us
> > > > > tmpRead2 = *read2; // 176 clocks - 0.586 us
> > > > >
> > > > > I've commented the measured clocktimes according to the simulator.
> > > > > 177 clocks for 1 read seems a bit much. Am I overlooking something? How
> > > > > can i acquire a higher transfer speed?
> > > >
> > > > I assume your design, when it takes shape, will treat the FIFO interface as async,
> > > > like an SRAM. What are your EMIF register settings for the CEn space containing the
> > > > FIFO? Have you set setup and hold times to match the FIFO data sheet? Will you be
> > > > connecting ARDY to a pin on the FIFO, and if so are you able to simulate that?
> > > >
> > > > -Jeff
> >
_____________________________________
Reply by ●June 23, 20092009-06-23
Hi Jeff,
thank you for your response, the design already has taken shape, I actualy designed the hardware and someone else has made the software design, I am currently modifying the software to add functionality. Where can I inspect these EMIF register settings or can you point me to a document where I can read up on it?
With kind regards,
Dominic Stuart
Hi all,
>
>I am a fairly new embedded programmer and this is my first post on this forum. I am working with a 6713 DSP and in my current project I am reading data from some FIFO's connected to the EMIF bus. My problem is the performance of the EMIF I have measured the time it takes to read from the EMIF and i have confirmed these findings with the simulator.
>
>I'm excecuting the folowing code:
>
> x++; // 10 clocks - 0.033 us
> read1 = (int*) 0x90300004; // 3 clocks - 0.010 us
> read2 = (int*) 0x90300008; // 3 clocks - 0.010 us
> tmpRead1 = *read1; // 177 clocks - 0.590 us
> tmpRead2 = *read2; // 176 clocks - 0.586 us
>
>I've commented the measured clocktimes according to the simulator. 177 clocks for 1 read seems a bit much. Am I overlooking something? How can i acquire a higher transfer speed?
>
>With kind regards,
>
>Dominic Stuart
>
>_____________________________________
_____________________________________
thank you for your response, the design already has taken shape, I actualy designed the hardware and someone else has made the software design, I am currently modifying the software to add functionality. Where can I inspect these EMIF register settings or can you point me to a document where I can read up on it?
With kind regards,
Dominic Stuart
Hi all,
>
>I am a fairly new embedded programmer and this is my first post on this forum. I am working with a 6713 DSP and in my current project I am reading data from some FIFO's connected to the EMIF bus. My problem is the performance of the EMIF I have measured the time it takes to read from the EMIF and i have confirmed these findings with the simulator.
>
>I'm excecuting the folowing code:
>
> x++; // 10 clocks - 0.033 us
> read1 = (int*) 0x90300004; // 3 clocks - 0.010 us
> read2 = (int*) 0x90300008; // 3 clocks - 0.010 us
> tmpRead1 = *read1; // 177 clocks - 0.590 us
> tmpRead2 = *read2; // 176 clocks - 0.586 us
>
>I've commented the measured clocktimes according to the simulator. 177 clocks for 1 read seems a bit much. Am I overlooking something? How can i acquire a higher transfer speed?
>
>With kind regards,
>
>Dominic Stuart
>
>_____________________________________
_____________________________________
Reply by ●June 23, 20092009-06-23
Hi Jeff,
I'm sorry i missed your PS, like i said I am new to posting in forums my apologies, and i think im posting in the group now, or am i still only replying to you?
With kind regards,
Dominic
-
--- In c..., Jeff Brower wrote:
>
> Dominic-
>
> Did you see my PS? If you just missed that and you can re-post then I'm Ok to
> continue to help.
>
> Otherwise I hope someone else might help you...
>
> -Jeff
> "d.stuartnl" wrote:
> >
> > I started out measuring the performance of the system with a hardware timer and printing the result to the RS232 channel. I found out that i could only read 30 bytes in 67.7 microseconds. This means I can read 1 byte every 2.256 us. I know the FIFO is filled with a dataclock with 4MHz so I'm sure there are bytes available every 0.25 us. When i discovered this problem I decided to run the code in the Simulator of CCS. I found that the timing the simulator suggests is very accurate if I compare it to the measured values I got from the Hardware timer.
> >
> > It all boils down to why is the read from the EMIF so slow? (in the simulator and in real world) I will read the EMIF reference guide you provided in your last response and hope to find some answers.
> >
> > With kind regards,
> >
> > Dominic Stuart
> >
> > --- In c..., Jeff Brower wrote:
> > >
> > > Dominic-
> > >
> > > > thank you for your response, the design actualy is already implemented,
> > > > I designed the hardware for the system and my ex-collegue has designed
> > > > the software.
> > >
> > > Ok... in that case I would avoid using the simulator. The only way to really know
> > > what's going on with hardware is to measure it in action. How are you measuring
> > > clock cycles? Dig scope or LA connected to FIFO signals?
> > >
> > > > I am currently modifying and adding functionality to the
> > > > software. Where can I find these EMIF register settings or can you
> > > > point me to a document where I can read up on this interface?
> > >
> > > Maybe these would help...
> > >
> > > C6x EMIF Reference Guide:
> > >
> > > http://focus.ti.com/lit/ug/spru266e/spru266e.pdf
> > >
> > > TMS320C6000 EMIF to External FIFO Interface App Note:
> > >
> > > http://focus.ti.com/lit/an/spra543/spra543.pdf
> > >
> > > -Jeff
> > >
> > > PS. Please post to the group, not to me. Also please don't cut text from previous
> > > posts in the thread, I had to put your text back. I have fun to try to help and
> > > answer questions, but not if I have to spend time formatting.
> > >
> > >
> > > > > > I am a fairly new embedded programmer and this is my first post on this
> > > > > > forum. I am working with a 6713 DSP and in my current project I am reading
> > > > > > data from some FIFO's connected to the EMIF bus. My problem is the
> > > > > > performance of the EMIF I have measured the time it takes to read from the
> > > > > > EMIF and i have confirmed these findings with the simulator.
> > > > > >
> > > > > > I'm excecuting the folowing code:
> > > > > >
> > > > > > x++; // 10 clocks - 0.033 us
> > > > > > read1 = (int*) 0x90300004; // 3 clocks - 0.010 us
> > > > > > read2 = (int*) 0x90300008; // 3 clocks - 0.010 us
> > > > > > tmpRead1 = *read1; // 177 clocks - 0.590 us
> > > > > > tmpRead2 = *read2; // 176 clocks - 0.586 us
> > > > > >
> > > > > > I've commented the measured clocktimes according to the simulator.
> > > > > > 177 clocks for 1 read seems a bit much. Am I overlooking something? How
> > > > > > can i acquire a higher transfer speed?
> > > > >
> > > > > I assume your design, when it takes shape, will treat the FIFO interface as async,
> > > > > like an SRAM. What are your EMIF register settings for the CEn space containing the
> > > > > FIFO? Have you set setup and hold times to match the FIFO data sheet? Will you be
> > > > > connecting ARDY to a pin on the FIFO, and if so are you able to simulate that?
> > > > >
> > > > > -Jeff
> >
_____________________________________
I'm sorry i missed your PS, like i said I am new to posting in forums my apologies, and i think im posting in the group now, or am i still only replying to you?
With kind regards,
Dominic
-
--- In c..., Jeff Brower wrote:
>
> Dominic-
>
> Did you see my PS? If you just missed that and you can re-post then I'm Ok to
> continue to help.
>
> Otherwise I hope someone else might help you...
>
> -Jeff
> "d.stuartnl" wrote:
> >
> > I started out measuring the performance of the system with a hardware timer and printing the result to the RS232 channel. I found out that i could only read 30 bytes in 67.7 microseconds. This means I can read 1 byte every 2.256 us. I know the FIFO is filled with a dataclock with 4MHz so I'm sure there are bytes available every 0.25 us. When i discovered this problem I decided to run the code in the Simulator of CCS. I found that the timing the simulator suggests is very accurate if I compare it to the measured values I got from the Hardware timer.
> >
> > It all boils down to why is the read from the EMIF so slow? (in the simulator and in real world) I will read the EMIF reference guide you provided in your last response and hope to find some answers.
> >
> > With kind regards,
> >
> > Dominic Stuart
> >
> > --- In c..., Jeff Brower wrote:
> > >
> > > Dominic-
> > >
> > > > thank you for your response, the design actualy is already implemented,
> > > > I designed the hardware for the system and my ex-collegue has designed
> > > > the software.
> > >
> > > Ok... in that case I would avoid using the simulator. The only way to really know
> > > what's going on with hardware is to measure it in action. How are you measuring
> > > clock cycles? Dig scope or LA connected to FIFO signals?
> > >
> > > > I am currently modifying and adding functionality to the
> > > > software. Where can I find these EMIF register settings or can you
> > > > point me to a document where I can read up on this interface?
> > >
> > > Maybe these would help...
> > >
> > > C6x EMIF Reference Guide:
> > >
> > > http://focus.ti.com/lit/ug/spru266e/spru266e.pdf
> > >
> > > TMS320C6000 EMIF to External FIFO Interface App Note:
> > >
> > > http://focus.ti.com/lit/an/spra543/spra543.pdf
> > >
> > > -Jeff
> > >
> > > PS. Please post to the group, not to me. Also please don't cut text from previous
> > > posts in the thread, I had to put your text back. I have fun to try to help and
> > > answer questions, but not if I have to spend time formatting.
> > >
> > >
> > > > > > I am a fairly new embedded programmer and this is my first post on this
> > > > > > forum. I am working with a 6713 DSP and in my current project I am reading
> > > > > > data from some FIFO's connected to the EMIF bus. My problem is the
> > > > > > performance of the EMIF I have measured the time it takes to read from the
> > > > > > EMIF and i have confirmed these findings with the simulator.
> > > > > >
> > > > > > I'm excecuting the folowing code:
> > > > > >
> > > > > > x++; // 10 clocks - 0.033 us
> > > > > > read1 = (int*) 0x90300004; // 3 clocks - 0.010 us
> > > > > > read2 = (int*) 0x90300008; // 3 clocks - 0.010 us
> > > > > > tmpRead1 = *read1; // 177 clocks - 0.590 us
> > > > > > tmpRead2 = *read2; // 176 clocks - 0.586 us
> > > > > >
> > > > > > I've commented the measured clocktimes according to the simulator.
> > > > > > 177 clocks for 1 read seems a bit much. Am I overlooking something? How
> > > > > > can i acquire a higher transfer speed?
> > > > >
> > > > > I assume your design, when it takes shape, will treat the FIFO interface as async,
> > > > > like an SRAM. What are your EMIF register settings for the CEn space containing the
> > > > > FIFO? Have you set setup and hold times to match the FIFO data sheet? Will you be
> > > > > connecting ARDY to a pin on the FIFO, and if so are you able to simulate that?
> > > > >
> > > > > -Jeff
> >
_____________________________________
Reply by ●June 23, 20092009-06-23
Dominic-
> I'm sorry i missed your PS, like i said I am new to posting in forums
> my apologies, and i think im posting in the group now, or am i still
> only replying to you?
Your post is showing on the group now...
> I started out measuring the performance of the system with a hardware
> timer and printing the result to the RS232 channel.
That's a good way.
> I found out that
> i could only read 30 bytes in 67.7 microseconds. This means I can read
> 1 byte every 2.256 us. I know the FIFO is filled with a dataclock with
> 4MHz so I'm sure there are bytes available every 0.25 us.
Can your FIFO operate synchronous? If so that might help. I know that C64x series
DSPs can be set up specifically for sync FIFO, not sure about C671x.
> When i
> discovered this problem I decided to run the code in the Simulator of
> CCS. I found that the timing the simulator suggests is very accurate if
> I compare it to the measured values I got from the Hardware timer.
Well that might be one reason to be suspicious. The simulator normally defaults to
"slowest possible" values, if I recall correctly, like 31 wait-states for an async
read, or something like that. So if you can optimize your EMIF register settings to
match the FIFO data sheet, hopefully you would see some improvement.
> It all boils down to why is the read from the EMIF so slow? (in the
> simulator and in real world) I will read the EMIF reference guide you
> provided in your last response and hope to find some answers.
-Jeff
> > > --- In c..., Jeff Brower wrote:
> > > >
> > > > Dominic-
> > > >
> > > > > thank you for your response, the design actualy is already implemented,
> > > > > I designed the hardware for the system and my ex-collegue has designed
> > > > > the software.
> > > >
> > > > Ok... in that case I would avoid using the simulator. The only way to really know
> > > > what's going on with hardware is to measure it in action. How are you measuring
> > > > clock cycles? Dig scope or LA connected to FIFO signals?
> > > >
> > > > > I am currently modifying and adding functionality to the
> > > > > software. Where can I find these EMIF register settings or can you
> > > > > point me to a document where I can read up on this interface?
> > > >
> > > > Maybe these would help...
> > > >
> > > > C6x EMIF Reference Guide:
> > > >
> > > > http://focus.ti.com/lit/ug/spru266e/spru266e.pdf
> > > >
> > > > TMS320C6000 EMIF to External FIFO Interface App Note:
> > > >
> > > > http://focus.ti.com/lit/an/spra543/spra543.pdf
> > > >
> > > > -Jeff
> > > >
> > > > PS. Please post to the group, not to me. Also please don't cut text from previous
> > > > posts in the thread, I had to put your text back. I have fun to try to help and
> > > > answer questions, but not if I have to spend time formatting.
> > > >
> > > >
> > > > > > > I am a fairly new embedded programmer and this is my first post on this
> > > > > > > forum. I am working with a 6713 DSP and in my current project I am reading
> > > > > > > data from some FIFO's connected to the EMIF bus. My problem is the
> > > > > > > performance of the EMIF I have measured the time it takes to read from the
> > > > > > > EMIF and i have confirmed these findings with the simulator.
> > > > > > >
> > > > > > > I'm excecuting the folowing code:
> > > > > > >
> > > > > > > x++; // 10 clocks - 0.033 us
> > > > > > > read1 = (int*) 0x90300004; // 3 clocks - 0.010 us
> > > > > > > read2 = (int*) 0x90300008; // 3 clocks - 0.010 us
> > > > > > > tmpRead1 = *read1; // 177 clocks - 0.590 us
> > > > > > > tmpRead2 = *read2; // 176 clocks - 0.586 us
> > > > > > >
> > > > > > > I've commented the measured clocktimes according to the simulator.
> > > > > > > 177 clocks for 1 read seems a bit much. Am I overlooking something? How
> > > > > > > can i acquire a higher transfer speed?
> > > > > >
> > > > > > I assume your design, when it takes shape, will treat the FIFO interface as async,
> > > > > > like an SRAM. What are your EMIF register settings for the CEn space containing the
> > > > > > FIFO? Have you set setup and hold times to match the FIFO data sheet? Will you be
> > > > > > connecting ARDY to a pin on the FIFO, and if so are you able to simulate that?
> > > > > >
> > > > > > -Jeff
> > > >
> >
>
> _____________________________________
_____________________________________
> I'm sorry i missed your PS, like i said I am new to posting in forums
> my apologies, and i think im posting in the group now, or am i still
> only replying to you?
Your post is showing on the group now...
> I started out measuring the performance of the system with a hardware
> timer and printing the result to the RS232 channel.
That's a good way.
> I found out that
> i could only read 30 bytes in 67.7 microseconds. This means I can read
> 1 byte every 2.256 us. I know the FIFO is filled with a dataclock with
> 4MHz so I'm sure there are bytes available every 0.25 us.
Can your FIFO operate synchronous? If so that might help. I know that C64x series
DSPs can be set up specifically for sync FIFO, not sure about C671x.
> When i
> discovered this problem I decided to run the code in the Simulator of
> CCS. I found that the timing the simulator suggests is very accurate if
> I compare it to the measured values I got from the Hardware timer.
Well that might be one reason to be suspicious. The simulator normally defaults to
"slowest possible" values, if I recall correctly, like 31 wait-states for an async
read, or something like that. So if you can optimize your EMIF register settings to
match the FIFO data sheet, hopefully you would see some improvement.
> It all boils down to why is the read from the EMIF so slow? (in the
> simulator and in real world) I will read the EMIF reference guide you
> provided in your last response and hope to find some answers.
-Jeff
> > > --- In c..., Jeff Brower wrote:
> > > >
> > > > Dominic-
> > > >
> > > > > thank you for your response, the design actualy is already implemented,
> > > > > I designed the hardware for the system and my ex-collegue has designed
> > > > > the software.
> > > >
> > > > Ok... in that case I would avoid using the simulator. The only way to really know
> > > > what's going on with hardware is to measure it in action. How are you measuring
> > > > clock cycles? Dig scope or LA connected to FIFO signals?
> > > >
> > > > > I am currently modifying and adding functionality to the
> > > > > software. Where can I find these EMIF register settings or can you
> > > > > point me to a document where I can read up on this interface?
> > > >
> > > > Maybe these would help...
> > > >
> > > > C6x EMIF Reference Guide:
> > > >
> > > > http://focus.ti.com/lit/ug/spru266e/spru266e.pdf
> > > >
> > > > TMS320C6000 EMIF to External FIFO Interface App Note:
> > > >
> > > > http://focus.ti.com/lit/an/spra543/spra543.pdf
> > > >
> > > > -Jeff
> > > >
> > > > PS. Please post to the group, not to me. Also please don't cut text from previous
> > > > posts in the thread, I had to put your text back. I have fun to try to help and
> > > > answer questions, but not if I have to spend time formatting.
> > > >
> > > >
> > > > > > > I am a fairly new embedded programmer and this is my first post on this
> > > > > > > forum. I am working with a 6713 DSP and in my current project I am reading
> > > > > > > data from some FIFO's connected to the EMIF bus. My problem is the
> > > > > > > performance of the EMIF I have measured the time it takes to read from the
> > > > > > > EMIF and i have confirmed these findings with the simulator.
> > > > > > >
> > > > > > > I'm excecuting the folowing code:
> > > > > > >
> > > > > > > x++; // 10 clocks - 0.033 us
> > > > > > > read1 = (int*) 0x90300004; // 3 clocks - 0.010 us
> > > > > > > read2 = (int*) 0x90300008; // 3 clocks - 0.010 us
> > > > > > > tmpRead1 = *read1; // 177 clocks - 0.590 us
> > > > > > > tmpRead2 = *read2; // 176 clocks - 0.586 us
> > > > > > >
> > > > > > > I've commented the measured clocktimes according to the simulator.
> > > > > > > 177 clocks for 1 read seems a bit much. Am I overlooking something? How
> > > > > > > can i acquire a higher transfer speed?
> > > > > >
> > > > > > I assume your design, when it takes shape, will treat the FIFO interface as async,
> > > > > > like an SRAM. What are your EMIF register settings for the CEn space containing the
> > > > > > FIFO? Have you set setup and hold times to match the FIFO data sheet? Will you be
> > > > > > connecting ARDY to a pin on the FIFO, and if so are you able to simulate that?
> > > > > >
> > > > > > -Jeff
> > > >
> >
>
> _____________________________________
_____________________________________
Reply by ●June 23, 20092009-06-23
D.S,
it looks, on first examination, like the memory at 0x90300000 has about 10 wait
states.
Have you examined the actual source code?
I would expect a max of 4 instructions to perform the 'tmpRead1 = *read2'
fetch read1 (source address)
fetch @ read1 (contents)
fetch tmpRead1 (destination address)
store @ tmpRead1 (contents)
R. Williams
---------- Original Message -----------
From: d...@yahoo.com
To: c...
Sent: Tue, 23 Jun 2009 09:17:13 -0400
Subject: [c6x] Slow EMIF transfer
> Hi all,
>
> I am a fairly new embedded programmer and this is my first post on
> this forum. I am working with a 6713 DSP and in my current project I
> am reading data from some FIFO's connected to the EMIF bus. My problem
> is the performance of the EMIF I have measured the time it takes to
> read from the EMIF and i have confirmed these findings with the simulator.
>
> I'm excecuting the folowing code:
>
> x++; // 10 clocks - 0.033 us
> read1 = (int*) 0x90300004; // 3 clocks - 0.010 us
> read2 = (int*) 0x90300008; // 3 clocks - 0.010 us
> tmpRead1 = *read1; // 177 clocks - 0.590 us
> tmpRead2 = *read2; // 176 clocks - 0.586 us
>
> I've commented the measured clocktimes according to the simulator. 177
> clocks for 1 read seems a bit much. Am I overlooking something? How
> can i acquire a higher transfer speed?
>
> With kind regards,
>
> Dominic Stuart
------- End of Original Message -------
_____________________________________
it looks, on first examination, like the memory at 0x90300000 has about 10 wait
states.
Have you examined the actual source code?
I would expect a max of 4 instructions to perform the 'tmpRead1 = *read2'
fetch read1 (source address)
fetch @ read1 (contents)
fetch tmpRead1 (destination address)
store @ tmpRead1 (contents)
R. Williams
---------- Original Message -----------
From: d...@yahoo.com
To: c...
Sent: Tue, 23 Jun 2009 09:17:13 -0400
Subject: [c6x] Slow EMIF transfer
> Hi all,
>
> I am a fairly new embedded programmer and this is my first post on
> this forum. I am working with a 6713 DSP and in my current project I
> am reading data from some FIFO's connected to the EMIF bus. My problem
> is the performance of the EMIF I have measured the time it takes to
> read from the EMIF and i have confirmed these findings with the simulator.
>
> I'm excecuting the folowing code:
>
> x++; // 10 clocks - 0.033 us
> read1 = (int*) 0x90300004; // 3 clocks - 0.010 us
> read2 = (int*) 0x90300008; // 3 clocks - 0.010 us
> tmpRead1 = *read1; // 177 clocks - 0.590 us
> tmpRead2 = *read2; // 176 clocks - 0.586 us
>
> I've commented the measured clocktimes according to the simulator. 177
> clocks for 1 read seems a bit much. Am I overlooking something? How
> can i acquire a higher transfer speed?
>
> With kind regards,
>
> Dominic Stuart
------- End of Original Message -------
_____________________________________
Reply by ●June 23, 20092009-06-23
http://focus.ti.com/lit/ug/spru266e/spru266e.pdf was the document that was
mentioned earlier that has the details of how the EMIF registers are
arranged, and what the bits mean.
The boot bios on my particular platform sets the EMIF correctly. (I've got
two platforms that are very similar but have different ram, so different
EMIF timing.)
I've also got the values that are for each of my platforms listed in my .GEL
file for CCS, since the emulator needs to know the details to make things
work properly.
On Tue, Jun 23, 2009 at 9:12 AM, wrote:
> Hi Jeff,
>
> thank you for your response, the design already has taken shape, I actualy
> designed the hardware and someone else has made the software design, I am
> currently modifying the software to add functionality. Where can I inspect
> these EMIF register settings or can you point me to a document where I can
> read up on it?
> With kind regards,
>
> Dominic Stuart
>
> Hi all,
> >
> >I am a fairly new embedded programmer and this is my first post on this
> forum. I am working with a 6713 DSP and in my current project I am reading
> data from some FIFO's connected to the EMIF bus. My problem is the
> performance of the EMIF I have measured the time it takes to read from the
> EMIF and i have confirmed these findings with the simulator.
> >
> >I'm excecuting the folowing code:
> >
> > x++; // 10 clocks - 0.033 us
> > read1 = (int*) 0x90300004; // 3 clocks - 0.010 us
> > read2 = (int*) 0x90300008; // 3 clocks - 0.010 us
> > tmpRead1 = *read1; // 177 clocks - 0.590 us
> > tmpRead2 = *read2; // 176 clocks - 0.586 us
> >
> >I've commented the measured clocktimes according to the simulator. 177
> clocks for 1 read seems a bit much. Am I overlooking something? How can i
> acquire a higher transfer speed?
> >
> >With kind regards,
> >
> >Dominic Stuart
> >
> >_____________________________________
> >
> >
>
>
mentioned earlier that has the details of how the EMIF registers are
arranged, and what the bits mean.
The boot bios on my particular platform sets the EMIF correctly. (I've got
two platforms that are very similar but have different ram, so different
EMIF timing.)
I've also got the values that are for each of my platforms listed in my .GEL
file for CCS, since the emulator needs to know the details to make things
work properly.
On Tue, Jun 23, 2009 at 9:12 AM, wrote:
> Hi Jeff,
>
> thank you for your response, the design already has taken shape, I actualy
> designed the hardware and someone else has made the software design, I am
> currently modifying the software to add functionality. Where can I inspect
> these EMIF register settings or can you point me to a document where I can
> read up on it?
> With kind regards,
>
> Dominic Stuart
>
> Hi all,
> >
> >I am a fairly new embedded programmer and this is my first post on this
> forum. I am working with a 6713 DSP and in my current project I am reading
> data from some FIFO's connected to the EMIF bus. My problem is the
> performance of the EMIF I have measured the time it takes to read from the
> EMIF and i have confirmed these findings with the simulator.
> >
> >I'm excecuting the folowing code:
> >
> > x++; // 10 clocks - 0.033 us
> > read1 = (int*) 0x90300004; // 3 clocks - 0.010 us
> > read2 = (int*) 0x90300008; // 3 clocks - 0.010 us
> > tmpRead1 = *read1; // 177 clocks - 0.590 us
> > tmpRead2 = *read2; // 176 clocks - 0.586 us
> >
> >I've commented the measured clocktimes according to the simulator. 177
> clocks for 1 read seems a bit much. Am I overlooking something? How can i
> acquire a higher transfer speed?
> >
> >With kind regards,
> >
> >Dominic Stuart
> >
> >_____________________________________
> >
> >
>
>
Reply by ●June 24, 20092009-06-24
Thanks for all of your responses, I've checked the .gel file and found that
the EMIF_CE registers for the FIFO's I'm reading from are configured
as 32-bit asynchronous. The FIFO's are capable of Synchronous datatransfer
so I will check the SPRU document and program the registers correctfully. I will
post a final message if that fixes my problem.
--- In c..., "Richard Williams" wrote:
>
> D.S,
>
> it looks, on first examination, like the memory at 0x90300000 has about 10 wait
> states.
>
> Have you examined the actual source code?
> I would expect a max of 4 instructions to perform the 'tmpRead1 = *read2'
> fetch read1 (source address)
> fetch @ read1 (contents)
> fetch tmpRead1 (destination address)
> store @ tmpRead1 (contents)
>
> R. Williams
> ---------- Original Message -----------
> From: d.stuartnl@...
> To: c...
> Sent: Tue, 23 Jun 2009 09:17:13 -0400
> Subject: [c6x] Slow EMIF transfer
>
> > Hi all,
> >
> > I am a fairly new embedded programmer and this is my first post on
> > this forum. I am working with a 6713 DSP and in my current project I
> > am reading data from some FIFO's connected to the EMIF bus. My problem
> > is the performance of the EMIF I have measured the time it takes to
> > read from the EMIF and i have confirmed these findings with the simulator.
> >
> > I'm excecuting the folowing code:
> >
> > x++; // 10 clocks - 0.033 us
> > read1 = (int*) 0x90300004; // 3 clocks - 0.010 us
> > read2 = (int*) 0x90300008; // 3 clocks - 0.010 us
> > tmpRead1 = *read1; // 177 clocks - 0.590 us
> > tmpRead2 = *read2; // 176 clocks - 0.586 us
> >
> > I've commented the measured clocktimes according to the simulator. 177
> > clocks for 1 read seems a bit much. Am I overlooking something? How
> > can i acquire a higher transfer speed?
> >
> > With kind regards,
> >
> > Dominic Stuart
> ------- End of Original Message -------
>
_____________________________________
--- In c..., "Richard Williams" wrote:
>
> D.S,
>
> it looks, on first examination, like the memory at 0x90300000 has about 10 wait
> states.
>
> Have you examined the actual source code?
> I would expect a max of 4 instructions to perform the 'tmpRead1 = *read2'
> fetch read1 (source address)
> fetch @ read1 (contents)
> fetch tmpRead1 (destination address)
> store @ tmpRead1 (contents)
>
> R. Williams
> ---------- Original Message -----------
> From: d.stuartnl@...
> To: c...
> Sent: Tue, 23 Jun 2009 09:17:13 -0400
> Subject: [c6x] Slow EMIF transfer
>
> > Hi all,
> >
> > I am a fairly new embedded programmer and this is my first post on
> > this forum. I am working with a 6713 DSP and in my current project I
> > am reading data from some FIFO's connected to the EMIF bus. My problem
> > is the performance of the EMIF I have measured the time it takes to
> > read from the EMIF and i have confirmed these findings with the simulator.
> >
> > I'm excecuting the folowing code:
> >
> > x++; // 10 clocks - 0.033 us
> > read1 = (int*) 0x90300004; // 3 clocks - 0.010 us
> > read2 = (int*) 0x90300008; // 3 clocks - 0.010 us
> > tmpRead1 = *read1; // 177 clocks - 0.590 us
> > tmpRead2 = *read2; // 176 clocks - 0.586 us
> >
> > I've commented the measured clocktimes according to the simulator. 177
> > clocks for 1 read seems a bit much. Am I overlooking something? How
> > can i acquire a higher transfer speed?
> >
> > With kind regards,
> >
> > Dominic Stuart
> ------- End of Original Message -------
>
_____________________________________
