TMS320DM642 EMIF with MT48LC4M32B@ SDRAM related ibis simulation

Hi, I have a question about TMS320DM642 EMIF related ibis simulation.
Previously I designed a DSP board with TMS320C6713 and all of its simulations with SDRAM went perfectly ok.

However when I performed the ibis simulation for a newer board, using TMS320DM642 EMIF with Micron Technology MT48LC4M32B2 SDRAM, I get some non-monotonic rise and fall waveform over the data pins (AED00 for example), similar to double clocking or dual edge, and it laps for about 450 ps.

However the same simulation on Address and Clock Signals on DM642 is all fine.

The same simulation with C6713 was all ok, no non-monitonic behaviour.

I wanted to ask is it all fine with the DM642-SDRAM interface ? , since I used a very simple transmission line model of 75 Ohms for it, using hyper lynx and the ti, and micron technnology provided ibis models.

I can email the snapshots of simulations if needed.

Thanking in advance for the help.
Regards

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