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Problem loading code with XDS560

Started by Alexandre Freire da Silva Osorio June 23, 2003
Hi,

We are having problems to download the .out when using XDS560 emulator.

We have a C6203 board and when we try to download the .out to the DSP via
XDS560, a message appears warning that the endianess of the target is different
from the endianess of the .out. The DSP was on-board programmed, via
pull-up/pull-down, to work in little-endian, but when we read CSR register, via
Code Composer, it's 8th bit is in '0', indicating big-endian.

The DSP pin that programs the endianess is connected to a PLX PCI bridge pin,
that drives the bus after the DSP reset. The DSP reads the pin value during its
reset, so in normal functioning (without emulator), the endianess is correctly
read by the DSP. But when we use the emulator, it seems that XDS560 reads the
pin value to determine the endianess, but at this time the bus belongs to the
PLX, that probably drives the pin to '0'. I think that the correct would be if
XDS560 read the CSR value, not the pin value.

Anyone could help me to solve this problem, i.e. what can I do in order to force
the XDS560 to read correctly the endianess?

Thank you,

Regards,
Alexandre



Hi, Jeff,

How can I do this? Is CSR memory mapped?

Alexandre

-----Original Message-----
From: Jeff Brower [mailto:]
Sent: Monday, June 23, 2003 1:24 PM
To: Alexandre Freire da Silva Osorio
Cc:
Subject: Re: [c6x] Problem loading code with XDS560 Alexandre Freire da Silva Osorio-

> We are having problems to download the .out when using XDS560 emulator.
>
> We have a C6203 board and when we try to download the .out to the DSP
> via XDS560, a message appears warning that the endianess of the target
> is different from the endianess of the .out. The DSP was on-board
> programmed, via pull-up/pull-down, to work in little-endian, but when
> we read CSR register, via Code Composer, it's 8th bit is in '0',
> indicating big-endian.
>
> The DSP pin that programs the endianess is connected to a PLX PCI
> bridge pin, that drives the bus after the DSP reset. The DSP reads
> the pin value during its reset, so in normal functioning (without
> emulator), the endianess is correctly read by the DSP. But when we
> use the emulator, it seems that XDS560 reads the pin value to
> determine the endianess, but at this time the bus belongs to the PLX,
> that probably drives the pin to '0'. I think that the correct would
> be if XDS560 read the CSR value, not the pin value.
>
> Anyone could help me to solve this problem, i.e. what can I do in
> order to force the XDS560 to read correctly the endianess?

Can you set the CSR register in a GEL file, prior to downloading code?

Jeff Brower
system engineer
Signalogic


Alexandre Freire da Silva Osorio-

> We are having problems to download the .out when using XDS560 emulator.
>
> We have a C6203 board and when we try to download the .out to the DSP
> via XDS560, a message appears warning that the endianess of the target
> is different from the endianess of the .out. The DSP was on-board
> programmed, via pull-up/pull-down, to work in little-endian, but when
> we read CSR register, via Code Composer, it's 8th bit is in '0',
> indicating big-endian.
>
> The DSP pin that programs the endianess is connected to a PLX PCI
> bridge pin, that drives the bus after the DSP reset. The DSP reads
> the pin value during its reset, so in normal functioning (without
> emulator), the endianess is correctly read by the DSP. But when we
> use the emulator, it seems that XDS560 reads the pin value to
> determine the endianess, but at this time the bus belongs to the PLX,
> that probably drives the pin to '0'. I think that the correct would
> be if XDS560 read the CSR value, not the pin value.
>
> Anyone could help me to solve this problem, i.e. what can I do in
> order to force the XDS560 to read correctly the endianess?

Can you set the CSR register in a GEL file, prior to downloading code?

Jeff Brower
system engineer
Signalogic



Hi, Alexandre Freire da Silva Osorio,

The key problem is the time order of reset of dsp and the state of the endianess
configuration pin. The pin must be high if you need little endian during the
reset of dsp. Each time you reset(manual, power on) you dsp the pin is read and
write to CSR. So why don't you directly pull it up?

The endianess bit in CSR is read only. So it is not problem of software, it is
your hardware. Have a scope to check the state of the configuration pin while
the dsp is in reset.

Wang Tao

----- Original Message -----
From: "Alexandre Freire da Silva Osorio" <>
Date: Mon, 23 Jun 2003 12:02:20 -0300
To: <>
Subject: [c6x] Problem loading code with XDS560

Re: Hi,
Re:
Re: We are having problems to download the .out when using XDS560 emulator.
Re:
Re: We have a C6203 board and when we try to download the .out to the DSP via
XDS560, a message appears warning that the endianess of the target is different
from the endianess of the .out. The DSP was on-board programmed, via
pull-up/pull-down, to work in little-endian, but when we read CSR register, via
Code Composer, it's 8th bit is in '0', indicating big-endian.
Re:
Re: The DSP pin that programs the endianess is connected to a PLX PCI bridge
pin, that drives the bus after the DSP reset. The DSP reads the pin value during
its reset, so in normal functioning (without emulator), the endianess is
correctly read by the DSP. But when we use the emulator, it seems that XDS560
reads the pin value to determine the endianess, but at this time the bus belongs
to the PLX, that probably drives the pin to '0'. I think that the correct would
be if XDS560 read the CSR value, not the pin value.
Re:
Re: Anyone could help me to solve this problem, i.e. what can I do in order to
force the XDS560 to read correctly the endianess?
Re:
Re: Thank you,
Re:
Re: Regards,
Re: Alexandre
Re:
Re:
Re:
Re: _____________________________________
Re: Note: If you do a simple "reply" with your email client, only the author of
this message will receive your answer. You need to do a "reply all" if you want
your answer to be distributed to the entire group.
Re:
Re: _____________________________________
Re: About this discussion group:
Re:
Re: To Join: Send an email to
Re:
Re: To Post: Send an email to
Re:
Re: To Leave: Send an email to
Re:
Re: Archives: http://www.yahoogroups.com/group/c6x
Re:
Re: Other Groups: http://www.dsprelated.com
Re:
Re:
Re: ">http://docs.yahoo.com/info/terms/
Re:
Re:

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Hi all,
Tao has given the right answer. When the pin is "pulled up", the board will be
in little endian and when it is down it will be in big endian.
CSR can't be set by software as it is a read only bit. The 8th bit as Alexandre
pointed out denotes the endianness. Hence when the power is switched on to the
board, the status of the pin determines your endianness.
BTW I have a doubt. Are you trying a little endian program or a big endian
program. I work on C6416 with same configuration but haven't had success with
big endian board and XDS560. There seems to be some problem with XDS560 drivers.
Actually for little endian mode, it works without a glitch but for big endian
mode, it opens the CCS but when I try to load the program, it gives a problem
with respect to memory mapping. Actually the GEL file provided with the XDS560
driver doesn't initialize the memories or rather memory-mapping doesn't occur.
when I modify the same GEL file with all the memory mapping initializations, it
doesn't open the CCS at all and hangs the CCS. I would like to know if anyone
else has succeeded in loading and running a big endian program on the board with
XDS560. If so, can you share the GEL file with me.
Also hope this clarifies your doubt.
Thanks and Regards,
Ganesh

----- Original Message -----
From: Tao Wang
To: Alexandre Freire da Silva Osorio ;
Sent: Tuesday, June 24, 2003 6:49 AM
Subject: Re: [c6x] Problem loading code with XDS560 Hi, Alexandre Freire da Silva Osorio,

The key problem is the time order of reset of dsp and the state of the
endianess configuration pin. The pin must be high if you need little endian
during the reset of dsp. Each time you reset(manual, power on) you dsp the pin
is read and write to CSR. So why don't you directly pull it up?

The endianess bit in CSR is read only. So it is not problem of software, it is
your hardware. Have a scope to check the state of the configuration pin while
the dsp is in reset.

Wang Tao

----- Original Message -----
From: "Alexandre Freire da Silva Osorio" <>
Date: Mon, 23 Jun 2003 12:02:20 -0300
To: <>
Subject: [c6x] Problem loading code with XDS560

Re: Hi,
Re:
Re: We are having problems to download the .out when using XDS560 emulator.
Re:
Re: We have a C6203 board and when we try to download the .out to the DSP via
XDS560, a message appears warning that the endianess of the target is different
from the endianess of the .out. The DSP was on-board programmed, via
pull-up/pull-down, to work in little-endian, but when we read CSR register, via
Code Composer, it's 8th bit is in '0', indicating big-endian.
Re:
Re: The DSP pin that programs the endianess is connected to a PLX PCI bridge
pin, that drives the bus after the DSP reset. The DSP reads the pin value during
its reset, so in normal functioning (without emulator), the endianess is
correctly read by the DSP. But when we use the emulator, it seems that XDS560
reads the pin value to determine the endianess, but at this time the bus belongs
to the PLX, that probably drives the pin to '0'. I think that the correct would
be if XDS560 read the CSR value, not the pin value.
Re:
Re: Anyone could help me to solve this problem, i.e. what can I do in order to
force the XDS560 to read correctly the endianess?
Re:
Re: Thank you,
Re:
Re: Regards,
Re: Alexandre
Re:
Re:
Re:
Re: _____________________________________
Re: Note: If you do a simple "reply" with your email client, only the author
of this message will receive your answer. You need to do a "reply all" if you
want your answer to be distributed to the entire group.
Re:
Re: _____________________________________
Re: About this discussion group:
Re:
Re: To Join: Send an email to
Re:
Re: To Post: Send an email to
Re:
Re: To Leave: Send an email to
Re:
Re: Archives: http://www.yahoogroups.com/group/c6x
Re:
Re: Other Groups: http://www.dsprelated.com
Re:
Re:
Re: ">http://docs.yahoo.com/info/terms/
Re:
Re:

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Ganesh and Tao,

Thank you very much for your answers.

The endianess pin in our board is already pulled-up (little-endian). So, the
problem seems to be the XDS560. It should read the 8th CSR bit, not the pin
directly. When we power-up the board, the DSP reads the pin as logical "1",
because PLX is not the bus master at this time. After this, we cannot guarantee
the pin value, because it is being mastered by PLX.

In respect to download a big-endian program, yes, we tried it and had the same
problem as Ganesh did. Many memory locations was not correctly loaded. We tried
it after we concluded that XDS would not correctly read the DSP endianess.

Thank you.

regards,
Alexandre -----Original Message-----
From: Ganesh Vijayan [mailto:]
Sent: Tuesday, June 24, 2003 1:46 AM
To: Alexandre Freire da Silva Osorio; ; Tao Wang
Subject: Re: [c6x] Problem loading code with XDS560 Hi all,
Tao has given the right answer. When the pin is "pulled up", the board will be
in little endian and when it is down it will be in big endian.
CSR can't be set by software as it is a read only bit. The 8th bit as Alexandre
pointed out denotes the endianness. Hence when the power is switched on to the
board, the status of the pin determines your endianness.
BTW I have a doubt. Are you trying a little endian program or a big endian
program. I work on C6416 with same configuration but haven't had success with
big endian board and XDS560. There seems to be some problem with XDS560 drivers.
Actually for little endian mode, it works without a glitch but for big endian
mode, it opens the CCS but when I try to load the program, it gives a problem
with respect to memory mapping. Actually the GEL file provided with the XDS560
driver doesn't initialize the memories or rather memory-mapping doesn't occur.
when I modify the same GEL file with all the memory mapping initializations, it
doesn't open the CCS at all and hangs the CCS. I would like to know if anyone
else has succeeded in loading and running a big endian program on the board with
XDS560. If so, can you share the GEL file with me.
Also hope this clarifies your doubt.
Thanks and Regards,
Ganesh ----- Original Message -----
From: Tao Wang <mailto:>
To: Alexandre Freire da Silva Osorio <mailto:> ;

Sent: Tuesday, June 24, 2003 6:49 AM
Subject: Re: [c6x] Problem loading code with XDS560

Hi, Alexandre Freire da Silva Osorio,

The key problem is the time order of reset of dsp and the state of the endianess
configuration pin. The pin must be high if you need little endian during the
reset of dsp. Each time you reset(manual, power on) you dsp the pin is read and
write to CSR. So why don't you directly pull it up?

The endianess bit in CSR is read only. So it is not problem of software, it is
your hardware. Have a scope to check the state of the configuration pin while
the dsp is in reset.

Wang Tao

----- Original Message -----
From: "Alexandre Freire da Silva Osorio" < >
Date: Mon, 23 Jun 2003 12:02:20 -0300
To: < >
Subject: [c6x] Problem loading code with XDS560

Re: Hi,
Re:
Re: We are having problems to download the .out when using XDS560 emulator.
Re:
Re: We have a C6203 board and when we try to download the .out to the DSP via
XDS560, a message appears warning that the endianess of the target is different
from the endianess of the .out. The DSP was on-board programmed, via
pull-up/pull-down, to work in little-endian, but when we read CSR register, via
Code Composer, it's 8th bit is in '0', indicating big-endian.
Re:
Re: The DSP pin that programs the endianess is connected to a PLX PCI bridge
pin, that drives the bus after the DSP reset. The DSP reads the pin value during
its reset, so in normal functioning (without emulator), the endianess is
correctly read by the DSP. But when we use the emulator, it seems that XDS560
reads the pin value to determine the endianess, but at this time the bus belongs
to the PLX, that probably drives the pin to '0'. I think that the correct would
be if XDS560 read the CSR value, not the pin value.
Re:
Re: Anyone could help me to solve this problem, i.e. what can I do in order to
force the XDS560 to read correctly the endianess?
Re:
Re: Thank you,
Re:
Re: Regards,
Re: Alexandre
Re:
Re:
Re:
Re: _____________________________________
Re: Note: If you do a simple "reply" with your email client, only the author of
this message will receive your answer. You need to do a "reply all" if you want
your answer to be distributed to the entire group.
Re:
Re: _____________________________________
Re: About this discussion group:
Re:
Re: To Join: Send an email to
Re:
Re: To Post: Send an email to
Re:
Re: To Leave: Send an email to
Re:
Re: Archives: http://www.yahoogroups.com/group/c6x
Re:
Re: Other Groups: http://www.dsprelated.com
Re:
Re:
Re: ">http://docs.yahoo.com/info/terms/
Re:
Re:

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Alexandre Freire da Silva Osorio-

> Thank you very much for your answers.
>
> The endianess pin in our board is already pulled-up (little-endian).
> So, the problem seems to be the XDS560. It should read the 8th CSR
> bit, not the pin directly. When we power-up the board, the DSP reads
> the pin as logical "1", because PLX is not the bus master at this
> time. After this, we cannot guarantee the pin value, because it is
> being mastered by PLX.
>
> In respect to download a big-endian program, yes, we tried it and
> had the same problem as Ganesh did. Many memory locations was not
> correctly loaded. We tried it after we concluded that XDS would not
> correctly read the DSP endianess.

Yes Ganesh's and Tao's answers are very good, much better than mine. It sort of
looks like CCS + XDS560 will not handle big endian yet, no matter what you try
to do
in hardware. Possible bug, maybe you could press TI for an answer. If you
want, I
can give you offline an engineering contact in TI's XDS560 test group.

-Jeff

> -----Original Message-----
> From: Ganesh Vijayan [mailto:]
> Sent: Tuesday, June 24, 2003 1:46 AM
> To: Alexandre Freire da Silva Osorio; ; Tao Wang
> Subject: Re: [c6x] Problem loading code with XDS560
>
> Hi all,
> Tao has given the right answer. When the pin is "pulled up", the board will be
in little endian and when it is down it will be in big endian.
> CSR can't be set by software as it is a read only bit. The 8th bit as
Alexandre pointed out denotes the endianness. Hence when the power is switched
on to the board, the status of the pin determines your endianness.
> BTW I have a doubt. Are you trying a little endian program or a big endian
program. I work on C6416 with same configuration but haven't had success with
big endian board and XDS560. There seems to be some problem with XDS560 drivers.
Actually for little endian mode, it works without a glitch but for big endian
mode, it opens the CCS but when I try to load the program, it gives a problem
with respect to memory mapping. Actually the GEL file provided with the XDS560
driver doesn't initialize the memories or rather memory-mapping doesn't occur.
when I modify the same GEL file with all the memory mapping initializations, it
doesn't open the CCS at all and hangs the CCS. I would like to know if anyone
else has succeeded in loading and running a big endian program on the board with
XDS560. If so, can you share the GEL file with me.
> Also hope this clarifies your doubt.
> Thanks and Regards,
> Ganesh
>
> ----- Original Message -----
> From: Tao Wang <mailto:>
> To: Alexandre Freire da Silva Osorio <mailto:> ;

> Sent: Tuesday, June 24, 2003 6:49 AM
> Subject: Re: [c6x] Problem loading code with XDS560
>
> Hi, Alexandre Freire da Silva Osorio,
>
> The key problem is the time order of reset of dsp and the state of the
endianess configuration pin. The pin must be high if you need little endian
during the reset of dsp. Each time you reset(manual, power on) you dsp the pin
is read and write to CSR. So why don't you directly pull it up?
>
> The endianess bit in CSR is read only. So it is not problem of software, it is
your hardware. Have a scope to check the state of the configuration pin while
the dsp is in reset.
>
> Wang Tao
>
> ----- Original Message -----
> From: "Alexandre Freire da Silva Osorio" < >
> Date: Mon, 23 Jun 2003 12:02:20 -0300
> To: < >
> Subject: [c6x] Problem loading code with XDS560
>
> Re: Hi,
> Re:
> Re: We are having problems to download the .out when using XDS560 emulator.
> Re:
> Re: We have a C6203 board and when we try to download the .out to the DSP via
XDS560, a message appears warning that the endianess of the target is different
from the endianess of the .out. The DSP was on-board programmed, via
pull-up/pull-down, to work in little-endian, but when we read CSR register, via
Code Composer, it's 8th bit is in '0', indicating big-endian.
> Re:
> Re: The DSP pin that programs the endianess is connected to a PLX PCI bridge
pin, that drives the bus after the DSP reset. The DSP reads the pin value during
its reset, so in normal functioning (without emulator), the endianess is
correctly read by the DSP. But when we use the emulator, it seems that XDS560
reads the pin value to determine the endianess, but at this time the bus belongs
to the PLX, that probably drives the pin to '0'. I think that the correct would
be if XDS560 read the CSR value, not the pin value.
> Re:
> Re: Anyone could help me to solve this problem, i.e. what can I do in order to
force the XDS560 to read correctly the endianess?
> Re:
> Re: Thank you,
> Re:
> Re: Regards,
> Re: Alexandre



Jeff,

Yes, I would like very much to obtain this contact in XDS560 test group. Thank
you.

Alexandre

-----Original Message-----
From: Jeff Brower [mailto:]
Sent: Tuesday, June 24, 2003 11:05 AM
To: Alexandre Freire da Silva Osorio
Cc:
Subject: Re: [c6x] Problem loading code with XDS560 Alexandre Freire da Silva Osorio-

> Thank you very much for your answers.
>
> The endianess pin in our board is already pulled-up (little-endian).
> So, the problem seems to be the XDS560. It should read the 8th CSR
> bit, not the pin directly. When we power-up the board, the DSP reads
> the pin as logical "1", because PLX is not the bus master at this
> time. After this, we cannot guarantee the pin value, because it is
> being mastered by PLX.
>
> In respect to download a big-endian program, yes, we tried it and
> had the same problem as Ganesh did. Many memory locations was not
> correctly loaded. We tried it after we concluded that XDS would not
> correctly read the DSP endianess.

Yes Ganesh's and Tao's answers are very good, much better than mine. It sort of
looks like CCS + XDS560 will not handle big endian yet, no matter what you try
to do
in hardware. Possible bug, maybe you could press TI for an answer. If you
want, I
can give you offline an engineering contact in TI's XDS560 test group.

-Jeff

> -----Original Message-----
> From: Ganesh Vijayan [mailto:]
> Sent: Tuesday, June 24, 2003 1:46 AM
> To: Alexandre Freire da Silva Osorio; ; Tao Wang
> Subject: Re: [c6x] Problem loading code with XDS560
>
> Hi all,
> Tao has given the right answer. When the pin is "pulled up", the board will be
in little endian and when it is down it will be in big endian.
> CSR can't be set by software as it is a read only bit. The 8th bit as
Alexandre pointed out denotes the endianness. Hence when the power is switched
on to the board, the status of the pin determines your endianness.
> BTW I have a doubt. Are you trying a little endian program or a big endian
program. I work on C6416 with same configuration but haven't had success with
big endian board and XDS560. There seems to be some problem with XDS560 drivers.
Actually for little endian mode, it works without a glitch but for big endian
mode, it opens the CCS but when I try to load the program, it gives a problem
with respect to memory mapping. Actually the GEL file provided with the XDS560
driver doesn't initialize the memories or rather memory-mapping doesn't occur.
when I modify the same GEL file with all the memory mapping initializations, it
doesn't open the CCS at all and hangs the CCS. I would like to know if anyone
else has succeeded in loading and running a big endian program on the board with
XDS560. If so, can you share the GEL file with me.
> Also hope this clarifies your doubt.
> Thanks and Regards,
> Ganesh
>
> ----- Original Message -----
> From: Tao Wang <mailto:>
> To: Alexandre Freire da Silva Osorio <mailto:> ;

> Sent: Tuesday, June 24, 2003 6:49 AM
> Subject: Re: [c6x] Problem loading code with XDS560
>
> Hi, Alexandre Freire da Silva Osorio,
>
> The key problem is the time order of reset of dsp and the state of the
endianess configuration pin. The pin must be high if you need little endian
during the reset of dsp. Each time you reset(manual, power on) you dsp the pin
is read and write to CSR. So why don't you directly pull it up?
>
> The endianess bit in CSR is read only. So it is not problem of software, it is
your hardware. Have a scope to check the state of the configuration pin while
the dsp is in reset.
>
> Wang Tao
>
> ----- Original Message -----
> From: "Alexandre Freire da Silva Osorio" < >
> Date: Mon, 23 Jun 2003 12:02:20 -0300
> To: < >
> Subject: [c6x] Problem loading code with XDS560
>
> Re: Hi,
> Re:
> Re: We are having problems to download the .out when using XDS560 emulator.
> Re:
> Re: We have a C6203 board and when we try to download the .out to the DSP via
XDS560, a message appears warning that the endianess of the target is different
from the endianess of the .out. The DSP was on-board programmed, via
pull-up/pull-down, to work in little-endian, but when we read CSR register, via
Code Composer, it's 8th bit is in '0', indicating big-endian.
> Re:
> Re: The DSP pin that programs the endianess is connected to a PLX PCI bridge
pin, that drives the bus after the DSP reset. The DSP reads the pin value during
its reset, so in normal functioning (without emulator), the endianess is
correctly read by the DSP. But when we use the emulator, it seems that XDS560
reads the pin value to determine the endianess, but at this time the bus belongs
to the PLX, that probably drives the pin to '0'. I think that the correct would
be if XDS560 read the CSR value, not the pin value.
> Re:
> Re: Anyone could help me to solve this problem, i.e. what can I do in order to
force the XDS560 to read correctly the endianess?
> Re:
> Re: Thank you,
> Re:
> Re: Regards,
> Re: Alexandre




Hi, Jeff and All,

I am also use xds560 with dsk6711 under windows98. I have not meet the big
endian problem because I use little endian. But I think there are other problem
with the emulator. So please let me know if there is some test result. There is
a .gel file for the dsk6711, it is very detailed, I don't know if it can be
refereced.

I have a problem with dsk6711.

Hardware:
1.dsk6711 rev 2.0 with no daughterboard
2.xds560 emulator and JTAG head
3.Intel Celeron 400Mhz PC
4.Creative soundcard and active sound box

Software:
1.Micrsoft Windows 98
2.CCS 2.1

I use JTAG to connect the dsk and PC. J7(in) is wired to the
soundcard on PC. J6(out) is wired to the active sound box. I add
"*(int *)0x01800004 = 0xFFFFFF03;" to the gel file
'dsk6211_6711.gel' to see contents of the flash with emulator.

I revised the POST program with my own bootloader(post.prj). I also
wrote a program that program the flash through JTAG and
emulator(flash.prj). Under emulator the POST program(with lnk.cmd)
work good. I relink the POST program with lnk_load.cmd and parse
'post.out' to 'code'(raw data in 32 bits). Then I program the flash
with 'code' using the program I write(flash.prj).

I close CCS and turn off the power and then turn on the power. But
the system does not work. I reopen CCS and view the dissambly find
that the PC stop at address 0x00000000. I run it step by step, it's
OK. From the phenomenon we can see the dsp has bootloaded with
copying the first 1k code from the flash to internal sram but does
not run the program. The reset button and 'xdsreset' also has no use.

Is the DSP6711 ruined or the DSK is ruined or there is something
wrong with my program or I have done some misoperation? Or the power has some
problem.

The attachments: project 'post', project 'flash', and the revised
"dsk6211_6711.gel".

I have send my problem to ti asia, but they say they can not open .rar, they
need .zip. I have to send it again with .zip.

Wang Tao
----- Original Message -----
From: Jeff Brower <>
Date: Tue, 24 Jun 2003 09:04:55 -0500
To: Alexandre Freire da Silva Osorio <>
Subject: Re: [c6x] Problem loading code with XDS560

Re: Alexandre Freire da Silva Osorio-
Re:
Re: > Thank you very much for your answers.
Re: >
Re: > The endianess pin in our board is already pulled-up (little-endian).
Re: > So, the problem seems to be the XDS560. It should read the 8th CSR
Re: > bit, not the pin directly. When we power-up the board, the DSP reads
Re: > the pin as logical "1", because PLX is not the bus master at this
Re: > time. After this, we cannot guarantee the pin value, because it is
Re: > being mastered by PLX.
Re: >
Re: > In respect to download a big-endian program, yes, we tried it and
Re: > had the same problem as Ganesh did. Many memory locations was not
Re: > correctly loaded. We tried it after we concluded that XDS would not
Re: > correctly read the DSP endianess.
Re:
Re: Yes Ganesh's and Tao's answers are very good, much better than mine. It
sort of
Re: looks like CCS + XDS560 will not handle big endian yet, no matter what you
try to do
Re: in hardware. Possible bug, maybe you could press TI for an answer. If you
want, I
Re: can give you offline an engineering contact in TI's XDS560 test group.
Re:
Re: -Jeff
Re:
Re: > -----Original Message-----
Re: > From: Ganesh Vijayan [mailto:]
Re: > Sent: Tuesday, June 24, 2003 1:46 AM
Re: > To: Alexandre Freire da Silva Osorio; ; Tao Wang
Re: > Subject: Re: [c6x] Problem loading code with XDS560
Re: >
Re: > Hi all,
Re: > Tao has given the right answer. When the pin is "pulled up", the board
will be in little endian and when it is down it will be in big endian.
Re: > CSR can't be set by software as it is a read only bit. The 8th bit as
Alexandre pointed out denotes the endianness. Hence when the power is switched
on to the board, the status of the pin determines your endianness.
Re: > BTW I have a doubt. Are you trying a little endian program or a big endian
program. I work on C6416 with same configuration but haven't had success with
big endian board and XDS560. There seems to be some problem with XDS560 drivers.
Actually for little endian mode, it works without a glitch but for big endian
mode, it opens the CCS but when I try to load the program, it gives a problem
with respect to memory mapping. Actually the GEL file provided with the XDS560
driver doesn't initialize the memories or rather memory-mapping doesn't occur.
when I modify the same GEL file with all the memory mapping initializations, it
doesn't open the CCS at all and hangs the CCS. I would like to know if anyone
else has succeeded in loading and running a big endian program on the board with
XDS560. If so, can you share the GEL file with me.
Re: > Also hope this clarifies your doubt.
Re: > Thanks and Regards,
Re: > Ganesh
Re: >
Re: > ----- Original Message -----
Re: > From: Tao Wang <mailto:>
Re: > To: Alexandre Freire da Silva Osorio <mailto:> ;

Re: > Sent: Tuesday, June 24, 2003 6:49 AM
Re: > Subject: Re: [c6x] Problem loading code with XDS560
Re: >
Re: > Hi, Alexandre Freire da Silva Osorio,
Re: >
Re: > The key problem is the time order of reset of dsp and the state of the
endianess configuration pin. The pin must be high if you need little endian
during the reset of dsp. Each time you reset(manual, power on) you dsp the pin
is read and write to CSR. So why don't you directly pull it up?
Re: >
Re: > The endianess bit in CSR is read only. So it is not problem of software,
it is your hardware. Have a scope to check the state of the configuration pin
while the dsp is in reset.
Re: >
Re: > Wang Tao
Re: >
Re: > ----- Original Message -----
Re: > From: "Alexandre Freire da Silva Osorio" < >
Re: > Date: Mon, 23 Jun 2003 12:02:20 -0300
Re: > To: < >
Re: > Subject: [c6x] Problem loading code with XDS560
Re: >
Re: > Re: Hi,
Re: > Re:
Re: > Re: We are having problems to download the .out when using XDS560
emulator.
Re: > Re:
Re: > Re: We have a C6203 board and when we try to download the .out to the DSP
via XDS560, a message appears warning that the endianess of the target is
different from the endianess of the .out. The DSP was on-board programmed, via
pull-up/pull-down, to work in little-endian, but when we read CSR register, via
Code Composer, it's 8th bit is in '0', indicating big-endian.
Re: > Re:
Re: > Re: The DSP pin that programs the endianess is connected to a PLX PCI
bridge pin, that drives the bus after the DSP reset. The DSP reads the pin value
during its reset, so in normal functioning (without emulator), the endianess is
correctly read by the DSP. But when we use the emulator, it seems that XDS560
reads the pin value to determine the endianess, but at this time the bus belongs
to the PLX, that probably drives the pin to '0'. I think that the correct would
be if XDS560 read the CSR value, not the pin value.
Re: > Re:
Re: > Re: Anyone could help me to solve this problem, i.e. what can I do in
order to force the XDS560 to read correctly the endianess?
Re: > Re:
Re: > Re: Thank you,
Re: > Re:
Re: > Re: Regards,
Re: > Re: Alexandre
Re:
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Attachment (not stored)
dsk6711.rar
Type: application/octet-stream

Hi Jeff,
You have hit the nail, right on the head. It definitely seems like CCS and
XDS560 wont work together in Big Endian mode.
We did try upgrading the CCS to 2.12, but haven't had much success. Also there
is news that CCS 2.20 is coming with in-built XDS560 drivers.
Does any one of you have CCS 2.20 ? If so, can you try using CCS 2.20 and XDS
560.
Regarding the bug, yeah we can press TI. May be offline we can press for an
answer.
You, Tao, Alexandre and me can be in loop and press for the answer.
With Warm Regards,
Ganesh

----- Original Message -----
From: Jeff Brower
Sent: Tuesday, June 24, 2003 7:34 PM
Subject: Re: [c6x] Problem loading code with XDS560
Yes Ganesh's and Tao's answers are very good, much better than mine. It sort
of
looks like CCS + XDS560 will not handle big endian yet, no matter what you try
to do
in hardware. Possible bug, maybe you could press TI for an answer. If you
want, I
can give you offline an engineering contact in TI's XDS560 test group.

-Jeff