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Hi I noticed that for the C6713/3B DSP there is an internal configurable PLL to generate various clock speeds for DSP core as well as peripherals. Knowing that, is it of any advantage to route the CLKOUT2/CLKOUT3 pins to ECLKIN of EMIF instead of using the internally generated system clock? What would be the various aspects of using the intenal configurable clock(PLL generated)the need to be taken care of? It is assumed that there is no external clock source being used for ECLKIN. Thanks Nithin |
C6713 EMIF clock
Started by ●January 14, 2005
