I noticed that for the C6713/3B DSP there is an internal
configurable PLL to generate various clock speeds for DSP core as
well as peripherals. Knowing that, is it of any advantage to route
the CLKOUT2/CLKOUT3 pins to ECLKIN of EMIF instead of using the
internally generated system clock? What would be the various aspects
of using the intenal configurable clock(PLL generated)the need to be
taken care of?
It is assumed that there is no external clock source being used for