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Hi Rick, >I could use some help with a design I am working on. I am using the >TMS320C6711B along with the MSP430F148 and two Xilinx FPGAs. I would like >to use all four devices in a single JTAG chain. But I understand that this >is not a good idea as the different vendor's tools will not work compatibly. > You should be able to set the devices you are not interested in into BYPASS mode, but the early versions of the C6711 were not JTAG-compliant (according to the errata sheet)! Who's emulator are you using, they may have different capabilities - I dunno. >Is this correct? Will I not be able to use the JTAG debugger on the >TMS320C6711 and MSP430F148 if I have the Xilinx parts in the chain? I have >viewed the JTAG documentation available on the TI web site. I still have >not been able to determine if the JTAG debugger will operate with the >Xilinx parts in the JTAG chain. I can't even tell if the TMS320C6711 and >MSP430F148 will be compatible. > I have no idea on this I'm afraid - I wussed out and put our FPGAs on a separate chain from the DSP! >I am not so worried about using the Xilinx tools. I don't expect to need to >use the Xilinx debugger. The Xilinx chips are in the chain for boundary scan. > >BTW, does anyone know how to use the TI emulator as a JTAG controller for >boundary scan? Is there documentation on that? Has anyone done boundary >scan before? What did you use as a controller? > Not seen anything on this, but I doubt it. You'll either have to get another piece of hardware, or if the Xilinx JTAG pod is anything like the Altera Byteblaster (ie a TTL buffer on the parallel port) you could always write your own :-) Cheers, Martin -- Martin Thompson BEng(Hons) CEng MIEE TRW Conekt Stratford Road, Solihull, B90 4GW. UK Tel: +44 (0)121-627-3569 - |
Re: Debugger on multichip JTAG chains
Started by ●January 15, 2002
