Problem accessing EMIFA registers through CCS

Hello Experts,

I had posted a little while back on a problem connecting to my DM640 custom
board. Now, I am able to connect to the board but I am not able to access
the EMIFA registers alone ( through CCS3.1). I am able to access all other
defined DM640 registers in the internal memory map including the internal
SRAM. But when I access 0x01800000 onwards upto the next 58h bytes, CCS
hangs or returns a 'BAD' memory value.

Can anyone suggest what might be wrong? I have tried disabling my GEL file,
explicitly setting up the memory map in CCS to only access this memory range
But it does not make things better.

Does this indicate a damaged chip? Or is it a settings problem?

Thanks in advance,

Anand Start a New Thread

Hello Anand,

--- Anand Krishnan wrote:

> Hello Experts,
>
> I had posted a little while back on a problem
> connecting to my DM640 custom
> board. Now, I am able to connect to the board but I
> am not able to access
> the EMIFA registers alone ( through CCS3.1). I am
> able to access all other
> defined DM640 registers in the internal memory map
> including the internal
> SRAM. But when I access 0x01800000 onwards upto the
> next 58h bytes, CCS
> hangs or returns a 'BAD' memory value.
>
> Can anyone suggest what might be wrong? I have tried
> disabling my GEL file,
> explicitly setting up the memory map in CCS to only
> access this memory range
> But it does not make things better.
>
> Does this indicate a damaged chip? Or is it a
> settings problem?
Try a couple of things first...
1. Bring up CCS without a GEL file.
2. Set to memory map to off [checkbox]. This enables
all memory locations.
3. try 'view->memory' at 0x0180.0000. If you still
get 'bad' or hangs, try step 4.
4. use edit->memory command to access 0x0180.0000 to
try to read the contents. The theory here is that
'memory->view' does a block read, sometimes reading
more addresses than you want. Sometimes there is an
issue with reading something beyond where you want.
When you use the 'edit->memory' command to view
memory, CCS only performs single word accesses.

mikedunn
>
> Thanks in advance,
>
> Anand
> c...
>
> Start a New Thread

Anand,

Something that I forgot -

What happens if you select view->registers->EMIF??

mikedunn

--- Anand Krishnan wrote:

> I had tried this too and it did not work. Since all
> DSP input pins seem ok,
> I have concluded that the DSP chip is at fault & am
> re-soldering a new one.
> Thanks for your suggestion- I will keep you posted.
>
> Regards,
> Anand
>
> -----Original Message-----
> From: c...
> [mailto:c...] On Behalf Of Mike
> Dunn
> Sent: Wednesday, April 19, 2006 7:23 AM
> To: Anand Krishnan; c...
> Subject: Re: [c6x] Problem accessing EMIFA registers
> through CCS
>
> Hello Anand,
>
> --- Anand Krishnan wrote:
>
> >
> >
> > Hello Experts,
> >
> > I had posted a little while back on a problem
> > connecting to my DM640 custom
> > board. Now, I am able to connect to the board but
> I
> > am not able to access
> > the EMIFA registers alone ( through CCS3.1). I am
> > able to access all other
> > defined DM640 registers in the internal memory map
> > including the internal
> > SRAM. But when I access 0x01800000 onwards upto
> the
> > next 58h bytes, CCS
> > hangs or returns a 'BAD' memory value.
> >
> > Can anyone suggest what might be wrong? I have
> tried
> > disabling my GEL file,
> > explicitly setting up the memory map in CCS to
> only
> > access this memory range
> > But it does not make things better.
> >
> > Does this indicate a damaged chip? Or is it a
> > settings problem?
> Try a couple of things first...
> 1. Bring up CCS without a GEL file.
> 2. Set to memory map to off [checkbox]. This
> enables
> all memory locations.
> 3. try 'view->memory' at 0x0180.0000. If you still
> get 'bad' or hangs, try step 4.
> 4. use edit->memory command to access 0x0180.0000 to
> try to read the contents. The theory here is that
> 'memory->view' does a block read, sometimes reading
> more addresses than you want. Sometimes there is an
> issue with reading something beyond where you want.
> When you use the 'edit->memory' command to view
> memory, CCS only performs single word accesses.
>
> mikedunn
> >
> > Thanks in advance,
> >
> > Anand
> >
> >
> >
> >
> >
> >
> >
> >
> > c...
> >
> >
> >
> >
> >
> > c...
>
>
> Start a New Thread

I had tried this too and it did not work. Since all DSP input pins seem ok,
I have concluded that the DSP chip is at fault & am re-soldering a new one.
Thanks for your suggestion- I will keep you posted.

Regards,
Anand

-----Original Message-----
From: c... [mailto:c...] On Behalf Of Mike
Dunn
Sent: Wednesday, April 19, 2006 7:23 AM
To: Anand Krishnan; c...
Subject: Re: [c6x] Problem accessing EMIFA registers through CCS

Hello Anand,

--- Anand Krishnan wrote:

> Hello Experts,
>
> I had posted a little while back on a problem
> connecting to my DM640 custom
> board. Now, I am able to connect to the board but I
> am not able to access
> the EMIFA registers alone ( through CCS3.1). I am
> able to access all other
> defined DM640 registers in the internal memory map
> including the internal
> SRAM. But when I access 0x01800000 onwards upto the
> next 58h bytes, CCS
> hangs or returns a 'BAD' memory value.
>
> Can anyone suggest what might be wrong? I have tried
> disabling my GEL file,
> explicitly setting up the memory map in CCS to only
> access this memory range
> But it does not make things better.
>
> Does this indicate a damaged chip? Or is it a
> settings problem?
Try a couple of things first...
1. Bring up CCS without a GEL file.
2. Set to memory map to off [checkbox]. This enables
all memory locations.
3. try 'view->memory' at 0x0180.0000. If you still
get 'bad' or hangs, try step 4.
4. use edit->memory command to access 0x0180.0000 to
try to read the contents. The theory here is that
'memory->view' does a block read, sometimes reading
more addresses than you want. Sometimes there is an
issue with reading something beyond where you want.
When you use the 'edit->memory' command to view
memory, CCS only performs single word accesses.

mikedunn
>
> Thanks in advance,
>
> Anand
> c...
>
> Start a New Thread

Mike,

I got the board with the fresh DSP soldered in. However, it still gives the
same problem reading the EMIF register range alone. I also tried
View->Registers->EMIF it gives me BAD values.

Thanks,
Anand

-----Original Message-----
From: c... [mailto:c...] On Behalf Of Mike
Dunn
Sent: Thursday, April 20, 2006 12:52 AM
To: Anand Krishnan; c...
Subject: RE: [c6x] Problem accessing EMIFA registers through CCS

Anand,

Something that I forgot -

What happens if you select view->registers->EMIF??

mikedunn

--- Anand Krishnan wrote:

> I had tried this too and it did not work. Since all
> DSP input pins seem ok,
> I have concluded that the DSP chip is at fault & am
> re-soldering a new one.
> Thanks for your suggestion- I will keep you posted.
>
> Regards,
> Anand
>
> -----Original Message-----
> From: c...
> [mailto:c...] On Behalf Of Mike
> Dunn
> Sent: Wednesday, April 19, 2006 7:23 AM
> To: Anand Krishnan; c...
> Subject: Re: [c6x] Problem accessing EMIFA registers
> through CCS
>
> Hello Anand,
>
> --- Anand Krishnan wrote:
>
> >
> >
> > Hello Experts,
> >
> > I had posted a little while back on a problem
> > connecting to my DM640 custom
> > board. Now, I am able to connect to the board but
> I
> > am not able to access
> > the EMIFA registers alone ( through CCS3.1). I am
> > able to access all other
> > defined DM640 registers in the internal memory map
> > including the internal
> > SRAM. But when I access 0x01800000 onwards upto
> the
> > next 58h bytes, CCS
> > hangs or returns a 'BAD' memory value.
> >
> > Can anyone suggest what might be wrong? I have
> tried
> > disabling my GEL file,
> > explicitly setting up the memory map in CCS to
> only
> > access this memory range
> > But it does not make things better.
> >
> > Does this indicate a damaged chip? Or is it a
> > settings problem?
> Try a couple of things first...
> 1. Bring up CCS without a GEL file.
> 2. Set to memory map to off [checkbox]. This
> enables
> all memory locations.
> 3. try 'view->memory' at 0x0180.0000. If you still
> get 'bad' or hangs, try step 4.
> 4. use edit->memory command to access 0x0180.0000 to
> try to read the contents. The theory here is that
> 'memory->view' does a block read, sometimes reading
> more addresses than you want. Sometimes there is an
> issue with reading something beyond where you want.
> When you use the 'edit->memory' command to view
> memory, CCS only performs single word accesses.
>
> mikedunn
> >
> > Thanks in advance,
> >
> > Anand
> >
> >
> >
> >
> >
> >
> >
> >
> > c...
> >
> >
> >
> >
> >
> > c...
>
>
> Start a New Thread

Hello Anand,

This is really strange, I have seen hundreds of c6x
related "bring up problems" and have never seen one
relating to not being able to access internal
registers.

I suggest that you try a little different strategy
[for now ignore the problem] and try to characterize
'what does work'. You mentioned that you could access
internal memory.
1. can you load a simple program into internal memory
and execute it??
2. can you step through some of the instructions??
3. if you open the 'core registers' window and step,
do you see some of the registers changing?? [PC, Ax,
Bx]
4. if you can do all of the above, create a simple
test case in C or assembly. Read 0x01800000 and the
next few locations, storing the results in an array or
registers. if the results appear to be
valid/reasonable, try to write the registers and then
read them.
5. The goal is to check out as much functionality as
you can by loading simple programs into internal
memory and executing them.
6. If you have an available co-worker, review all of
the DSP pin connections with them [ I have found that
it is difficult for me to find my own mistakes, but if
I have to explain what I did to someone else I
sometimes see something that I did wrong].
7. Are you 100% sure that both EMU0 and 1 are pulled
up [I know that at least one of them is or you would
not be able to connect to the target with CCS]. There
may be a remote chance that you are initializing the
device in some sort of 'test mode' because of a
misconfiguration of pins.

good luck,
mikedunn

--- Anand Krishnan wrote:

> Mike,
>
> I got the board with the fresh DSP soldered in.
> However, it still gives the
> same problem reading the EMIF register range alone.
> I also tried
> View->Registers->EMIF it gives me BAD values.
>
> Thanks,
> Anand
>
> -----Original Message-----
> From: c...
> [mailto:c...] On Behalf Of Mike
> Dunn
> Sent: Thursday, April 20, 2006 12:52 AM
> To: Anand Krishnan; c...
> Subject: RE: [c6x] Problem accessing EMIFA registers
> through CCS
>
> Anand,
>
> Something that I forgot -
>
> What happens if you select view->registers->EMIF??
>
> mikedunn
>
> --- Anand Krishnan wrote:
>
> > I had tried this too and it did not work. Since
> all
> > DSP input pins seem ok,
> > I have concluded that the DSP chip is at fault &
> am
> > re-soldering a new one.
> > Thanks for your suggestion- I will keep you
> posted.
> >
> > Regards,
> > Anand
> >
> > -----Original Message-----
> > From: c...
> > [mailto:c...] On Behalf Of Mike
> > Dunn
> > Sent: Wednesday, April 19, 2006 7:23 AM
> > To: Anand Krishnan; c...
> > Subject: Re: [c6x] Problem accessing EMIFA
> registers
> > through CCS
> >
> > Hello Anand,
> >
> > --- Anand Krishnan wrote:
> >
> > >
> > >
> > > Hello Experts,
> > >
> > > I had posted a little while back on a problem
> > > connecting to my DM640 custom
> > > board. Now, I am able to connect to the board
> but
> > I
> > > am not able to access
> > > the EMIFA registers alone ( through CCS3.1). I
> am
> > > able to access all other
> > > defined DM640 registers in the internal memory
> map
> > > including the internal
> > > SRAM. But when I access 0x01800000 onwards upto
> > the
> > > next 58h bytes, CCS
> > > hangs or returns a 'BAD' memory value.
> > >
> > > Can anyone suggest what might be wrong? I have
> > tried
> > > disabling my GEL file,
> > > explicitly setting up the memory map in CCS to
> > only
> > > access this memory range
> > > But it does not make things better.
> > >
> > > Does this indicate a damaged chip? Or is it a
> > > settings problem?
> > Try a couple of things first...
> > 1. Bring up CCS without a GEL file.
> > 2. Set to memory map to off [checkbox]. This
> > enables
> > all memory locations.
> > 3. try 'view->memory' at 0x0180.0000. If you
> still
> > get 'bad' or hangs, try step 4.
> > 4. use edit->memory command to access 0x0180.0000
> to
> > try to read the contents. The theory here is that
> > 'memory->view' does a block read, sometimes
> reading
> > more addresses than you want. Sometimes there is
> an
> > issue with reading something beyond where you
> want.
> > When you use the 'edit->memory' command to view
> > memory, CCS only performs single word accesses.
> >
> > mikedunn
> > >
> > > Thanks in advance,
> > >
> > > Anand
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > > c...
> > >
> > >
> > >
> > >
> > >
> > >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> > c...
> >
> >
> >
> >
> Start a New Thread

Hello Mike,

Problem was solved! And traced back to not pulling up the AEA19 pin
(AECLKINsel) with a 1K. We are meaning to use CPU/4 to drive EMIF but this
mistake was making
The DSP believe it is to be clocked by AECLKIN which is a no- connect
on our board. We are now able to access and write all registers and our
SDRAM also seems to be working.

One observation from this is that EMIF internal registers themselves seem to
need the EMIF clock identified to permit read- write.

Really grateful for your systematic help and suggestions!

Regards,
Anand

-----Original Message-----
From: c... [mailto:c...] On Behalf Of Mike
Dunn
Sent: Friday, April 21, 2006 6:55 PM
To: Anand Krishnan; c...
Subject: RE: [c6x] Problem accessing EMIFA registers through CCS

Hello Anand,

This is really strange, I have seen hundreds of c6x
related "bring up problems" and have never seen one
relating to not being able to access internal
registers.

I suggest that you try a little different strategy
[for now ignore the problem] and try to characterize
'what does work'. You mentioned that you could access
internal memory.
1. can you load a simple program into internal memory
and execute it??
2. can you step through some of the instructions??
3. if you open the 'core registers' window and step,
do you see some of the registers changing?? [PC, Ax,
Bx]
4. if you can do all of the above, create a simple
test case in C or assembly. Read 0x01800000 and the
next few locations, storing the results in an array or
registers. if the results appear to be
valid/reasonable, try to write the registers and then
read them.
5. The goal is to check out as much functionality as
you can by loading simple programs into internal
memory and executing them.
6. If you have an available co-worker, review all of
the DSP pin connections with them [ I have found that
it is difficult for me to find my own mistakes, but if
I have to explain what I did to someone else I
sometimes see something that I did wrong].
7. Are you 100% sure that both EMU0 and 1 are pulled
up [I know that at least one of them is or you would
not be able to connect to the target with CCS]. There
may be a remote chance that you are initializing the
device in some sort of 'test mode' because of a
misconfiguration of pins.

good luck,
mikedunn

--- Anand Krishnan wrote: Start a New Thread

Anand-

> Problem was solved! And traced back to not pulling up the AEA19 pin
> (AECLKINsel) with a 1K. We are meaning to use CPU/4 to drive EMIF but
> this mistake was making
> The DSP believe it is to be clocked by AECLKIN which is a no- connect
> on our board. We are now able to access and write all registers and our
> SDRAM also seems to be working.
>
> One observation from this is that EMIF internal registers themselves seem
> to need the EMIF clock identified to permit read- write.
>
> Really grateful for your systematic help and suggestions!

Congratulations on your persistence and good result. After all the
struggle -- even replacing the chip -- this will be your "DSP board battle
story" :-)

-Jeff

> -----Original Message-----
> From: c... [mailto:c...] On Behalf Of Mike
> Dunn
> Sent: Friday, April 21, 2006 6:55 PM
> To: Anand Krishnan; c...
> Subject: RE: [c6x] Problem accessing EMIFA registers through CCS
>
> Hello Anand,
>
> This is really strange, I have seen hundreds of c6x
> related "bring up problems" and have never seen one
> relating to not being able to access internal
> registers.
>
> I suggest that you try a little different strategy
> [for now ignore the problem] and try to characterize
> 'what does work'. You mentioned that you could access
> internal memory.
> 1. can you load a simple program into internal memory
> and execute it??
> 2. can you step through some of the instructions??
> 3. if you open the 'core registers' window and step,
> do you see some of the registers changing?? [PC, Ax,
> Bx]
> 4. if you can do all of the above, create a simple
> test case in C or assembly. Read 0x01800000 and the
> next few locations, storing the results in an array or
> registers. if the results appear to be
> valid/reasonable, try to write the registers and then
> read them.
> 5. The goal is to check out as much functionality as
> you can by loading simple programs into internal
> memory and executing them.
> 6. If you have an available co-worker, review all of
> the DSP pin connections with them [ I have found that
> it is difficult for me to find my own mistakes, but if
> I have to explain what I did to someone else I
> sometimes see something that I did wrong].
> 7. Are you 100% sure that both EMU0 and 1 are pulled
> up [I know that at least one of them is or you would
> not be able to connect to the target with CCS]. There
> may be a remote chance that you are initializing the
> device in some sort of 'test mode' because of a
> misconfiguration of pins.
>
> good luck,
> mikedunn
>
> --- Anand Krishnan wrote: Start a New Thread

Anand-

> My battle with the DMm640 board is far from over!
> Thanks Jeff for your empathy!
>
> Now, my issue is with the SDRAM on board. I was
> Able to tune EMIF settings on my GEL ( & turn off cache)
> to achieve the Following results:
>
> 1. If I write & run code in internal memory to write
> and read back from the entire 16MB range on my SDRAM
> ( 80000000 thru' 80FFFFFF), I am able to consistently
> read back correct values for all the way up to
> 80c00000- which means 12MB out of 16MB and which
> corresponds to 3 of the 4 banks in my single SDRAM chip.
> The last bank gives inconsistent results and always fails
> In at least a few memory locations.

I think you have to fix that. If part of the SDRAM range is not working, that could
indicate a larger problem that hasn't been detected yet, and will show up later in
some (probably negative) way to surprise you.

-Jeff

> 2. Not wanting to fight for the extra 4MB, I enabled only
> 12MB worth of external memory in my GEL file.
> 3. Now, I tried loading a simple 'Hello world' type program
> to run from external memory. This program travels to some weird
> internal memory locations and never reaches my print statement.
>
> What I want to ask is as follows:
> 1. Does point 1 of my observation certify that my 12MB is Ok in Hardware &
> the program error is some settings issue?
> 2. If I choose to use half or one quarter of EMIF frequency (ECLKOUT2), do I
> have to go and update all my EMIF timing registers to test out with lower
> frequency?
> 3. Does anyone have any further hints on the issue?
>
> We did do an SI on our board before fabricating but I am not sure if there
> is something we missed modeling.
>
> Thanks in advance for your help!
> Anand
>
> -----Original Message-----
> From: Jeff Brower [mailto:j...@signalogic.com]
> Sent: Monday, April 24, 2006 8:45 PM
> To: Anand Krishnan
> Cc: c...
> Subject: RE: [c6x] Problem accessing EMIFA registers through CCS
>
> Anand-
>
> > Problem was solved! And traced back to not pulling up the AEA19 pin
> > (AECLKINsel) with a 1K. We are meaning to use CPU/4 to drive EMIF but
> > this mistake was making
> > The DSP believe it is to be clocked by AECLKIN which is a no- connect
> > on our board. We are now able to access and write all registers and our
> > SDRAM also seems to be working.
> >
> > One observation from this is that EMIF internal registers themselves seem
> > to need the EMIF clock identified to permit read- write.
> >
> > Really grateful for your systematic help and suggestions!
>
> Congratulations on your persistence and good result. After all the
> struggle -- even replacing the chip -- this will be your "DSP board battle
> story" :-)
>
> -Jeff Start a New Thread

Dear All,

My battle with the DMm640 board is far from over!
Thanks Jeff for your empathy!

Now, my issue is with the SDRAM on board. I was
Able to tune EMIF settings on my GEL ( & turn off cache)
to achieve the Following results:

1. If I write & run code in internal memory to write
and read back from the entire 16MB range on my SDRAM
( 80000000 thru' 80FFFFFF), I am able to consistently
read back correct values for all the way up to
80c00000- which means 12MB out of 16MB and which
corresponds to 3 of the 4 banks in my single SDRAM chip.
The last bank gives inconsistent results and always fails
In at least a few memory locations.
2. Not wanting to fight for the extra 4MB, I enabled only
12MB worth of external memory in my GEL file.
3. Now, I tried loading a simple 'Hello world' type program
to run from external memory. This program travels to some weird
internal memory locations and never reaches my print statement.

What I want to ask is as follows:
1. Does point 1 of my observation certify that my 12MB is Ok in Hardware &
the program error is some settings issue?
2. If I choose to use half or one quarter of EMIF frequency (ECLKOUT2), do I
have to go and update all my EMIF timing registers to test out with lower
frequency?
3. Does anyone have any further hints on the issue?

We did do an SI on our board before fabricating but I am not sure if there
is something we missed modeling.

Thanks in advance for your help!
Anand

-----Original Message-----
From: Jeff Brower [mailto:j...@signalogic.com]
Sent: Monday, April 24, 2006 8:45 PM
To: Anand Krishnan
Cc: c...
Subject: RE: [c6x] Problem accessing EMIFA registers through CCS

Anand-

> Problem was solved! And traced back to not pulling up the AEA19 pin
> (AECLKINsel) with a 1K. We are meaning to use CPU/4 to drive EMIF but
> this mistake was making
> The DSP believe it is to be clocked by AECLKIN which is a no- connect
> on our board. We are now able to access and write all registers and our
> SDRAM also seems to be working.
>
> One observation from this is that EMIF internal registers themselves seem
> to need the EMIF clock identified to permit read- write.
>
> Really grateful for your systematic help and suggestions!

Congratulations on your persistence and good result. After all the
struggle -- even replacing the chip -- this will be your "DSP board battle
story" :-)

-Jeff Start a New Thread