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Video Port on DM642

Started by mayank agarwal August 18, 2006
Hi,
i am configuring video port on DM642.I have some
doubts.The video port is configured in display side.

For a field size of 128(threshold=2(in double words))
dispevt1 =8.Then i have some confusion regarding edma
a count and bcount.will be it equal to 64 for Y and 32
for Cb,Cr or some other value.
In the above case 8 dma events will be generated for
fld1 per Y,Cb,Cr in that case if the edma will
automatically adjust to 8 bytes of Y,4 for Cb,4 for Cr
regardless of whatever value i set in ACOUNT and
BCOUNT
of edma.

Regards,
Mayank

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> 1. video port on DM642
> Posted by: "mayank agarwal" m...@yahoo.com
> Date: Sat Aug 19, 2006 5:13 am (PDT)
>
> iN SPRU629D BT .656 fifo packing is described if any
> one can tell me how the data is divided between
> Y,cB,Cr buffers in FIFO for transfer through channel A
> and Channel b.
> Regards,
> Mayank

Hi Mayank,

If I understood your question correctly, the FIFO has separate addresses
for color planes (separate for capture and display) somewhere
in the 0x7....... memory address range. They are listed in the
DM64x data sheet. This means that three different edma channels need
to be set up to service the three color planes.

Video port channels A, B have separate FIFOs, hence separate FIFO
addresses, six in total.

Regards,

Andrew
I could not get you.Actually when i am configuring
VP in Y/C mode for simple 8 bit capture and display it
is working fine but when i am checking for external
control by enabling EXC=1 I am not getting anything
on capture side.In the spec there are settings for
VCTL2 only in VD_CTL register.
Are there any more settingd i have to make.
Regards,
Mayank

--- Ashish Valuskar wrote:

> hello mayank,
> while configuring video port of dm642 vctl2 will be
> o/p for y/c .
> thanks and rgds
> ashish
>
> On 9/14/06, mayank agarwal
> wrote:
> >
> > While configuring the video port on DM642 for
> capture
> > with external control(EXC=1) i came across the
> line-
> > VCTL2 must be configured as external control
> signal.i
> > could not exacltly get what that means ,whether it
> > imlies that VCTL2 should be output as
> VSYNC/VBLNK/AVID
> > on the display side or there are some more
> settings to
> > be done on capture side itself.I am using the Y/C
> 8bit
> > mode for both capture and display.
> > Thanks and Regards,
> > Mayank Agarwal
> >
> >
> > __________________________________________________
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