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Production testing of 6400 BGA pc boards with Xray and/or JTAG?

Started by pn2500 November 29, 2007
Anyone have any tips on production testing techniques for pc boards
using the C64xx BGA chip?

i.e. is Xray inspection of the BGA contacts standard?

Are there test programs using JTAG that can check for opens/shorts and
do external memory bus testing?

Has anyone gotten advice from TI in doing design-for-test with the C64xx
that they could share?

Thanks!
Hello Peter,

On 11/29/07, pn2500 wrote:
> Anyone have any tips on production testing techniques for pc boards
> using the C64xx BGA chip?

Yes.
There are dozens of specific techniques in use by 'large and small players'.
Today's modern devices with BGA components and fine pitch boards are
tested in a variety of ways depending on intended use and volume. The
simple goals - make sure that it works and be 99.99% sure that it will
work when installed.

If your board is able to be 100% functional tested, low volume, and
used in 'normal office temperature environments', I think that a
comprehensive function test while running the temperature at the high
end and varying the voltages from min to max is a pretty good starting
place. I have been in shops that do much more and much less. The flow
would look like -
1. run quick functional test.
2. if pass, run comprehensive functional test.

>
> i.e. is Xray inspection of the BGA contacts standard?

I do not believe that Xray is 'standard'. In my personal experience [a
few years ago when BGA was kind of a 'new thing'] with prototypes it
was near impossible to detect opens.
>
> Are there test programs using JTAG that can check for opens/shorts and
> do external memory bus testing?

You can use JTAG boundary scan [BS] to perform 'static' [low speed]
testing for opens and shorts. In a 'normal mfg flow', I wouldn't use
BS. I think that it is more usefull for fault isolation/identification
on fall outs. [I have seen it used to test paths and program Flash in
the 'normal flow'].
>
> Has anyone gotten advice from TI in doing design-for-test with the C64xx
> that they could share?

This isn't any magic from TI, but it might be useful - tailor it to
your 'careabouts'.
Off the top of my head...
1. Consider test during board design
2. Explicitly make every signal that you might want to look at
accessible [this obviously includes clocks].
3. Provision for power supply current measurements and power
isolation. If chip power can be isolated that is very nice. A sick DSP
[a very rare event] often has abnormal current consumption.
4. Include at least 1 maintenance jumper and indicator.
5. Avoid write only registers when possible.
6. Provide loop back capability. This may be on board, external
jumper, or may require an external 'test board' to rerout/capture the
signals.
7. Include manual reset capability.
8. If there is a watchdog timer, provide a method [HW or SW] to disable it.
9. Make sure that the board has a 'debugable minimum configuration'. I
have seen boards that required other boards to be plugged in for them
to come up - don't do that.
> Thanks!

--
www.dsprelated.com/blogs-1/nf/Mike_Dunn.php
Hi Peter,

We just went through a design and build of our DSP board with 7 BGAs
on it. The board we are building is a pre-production prototype, but
some steps we went through that may help you are:

- Inspect the PWB before parts are installed. There were some vias
(signal through holes) we found around the BGAs that the vendor
missed masking out. Also check the PWB using a connectivity test
(shorts, etc...).

- The assembly house offered x-rays on all BGAs as part of board buy-
off. This may save debugging time later if you have a short
underneath the BGA.

- We opted not to do the JTAG boundary scan. This step may save
some troubleshooting time later but you have to do your own price
justification. This test is typically done when you are building a
production lot or if you don't have time for a possible
respin/rework.

- When you are ready to power up the board, use a power supply that
has current limiting capability. This way you don't smoke anything
if there is a short.

A tool that we had in-house that helped us a lot was an thermal
imager. We had a short, so we slowly cranked up the input power and
see where on the board it gets hot. This saved us a lot of
troubleshooting time. This equipment is expensive but you can rent
it.

The assembly house may also have other tools which may help
troubleshooting, such as a fiber microscope that can fit and see
underneath the BGAs.

Hope this helps,
Phong

--- In c..., "Michael Dunn" wrote:
>
> Hello Peter,
>
> On 11/29/07, pn2500 wrote:
> > Anyone have any tips on production testing techniques for pc
boards
> > using the C64xx BGA chip?
>
> Yes.
> There are dozens of specific techniques in use by 'large and small
players'.
> Today's modern devices with BGA components and fine pitch boards
are
> tested in a variety of ways depending on intended use and volume.
The
> simple goals - make sure that it works and be 99.99% sure that it
will
> work when installed.
>
> If your board is able to be 100% functional tested, low volume, and
> used in 'normal office temperature environments', I think that a
> comprehensive function test while running the temperature at the
high
> end and varying the voltages from min to max is a pretty good
starting
> place. I have been in shops that do much more and much less. The
flow
> would look like -
> 1. run quick functional test.
> 2. if pass, run comprehensive functional test.
>
> >
> > i.e. is Xray inspection of the BGA contacts standard?
>
> I do not believe that Xray is 'standard'. In my personal
experience [a
> few years ago when BGA was kind of a 'new thing'] with prototypes
it
> was near impossible to detect opens.
> >
> > Are there test programs using JTAG that can check for
opens/shorts and
> > do external memory bus testing?
>
> You can use JTAG boundary scan [BS] to perform 'static' [low speed]
> testing for opens and shorts. In a 'normal mfg flow', I wouldn't
use
> BS. I think that it is more usefull for fault
isolation/identification
> on fall outs. [I have seen it used to test paths and program Flash
in
> the 'normal flow'].
> >
> > Has anyone gotten advice from TI in doing design-for-test with
the C64xx
> > that they could share?
>
> This isn't any magic from TI, but it might be useful - tailor it to
> your 'careabouts'.
> Off the top of my head...
> 1. Consider test during board design
> 2. Explicitly make every signal that you might want to look at
> accessible [this obviously includes clocks].
> 3. Provision for power supply current measurements and power
> isolation. If chip power can be isolated that is very nice. A sick
DSP
> [a very rare event] often has abnormal current consumption.
> 4. Include at least 1 maintenance jumper and indicator.
> 5. Avoid write only registers when possible.
> 6. Provide loop back capability. This may be on board, external
> jumper, or may require an external 'test board' to rerout/capture
the
> signals.
> 7. Include manual reset capability.
> 8. If there is a watchdog timer, provide a method [HW or SW] to
disable it.
> 9. Make sure that the board has a 'debugable minimum
configuration'. I
> have seen boards that required other boards to be plugged in for
them
> to come up - don't do that.
> >
> >
> > Thanks!
> >
> > --
> www.dsprelated.com/blogs-1/nf/Mike_Dunn.php
>